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References: <12eba824-ee80-0aac-56ed-e13084c9cae7@amd.com> <20220324104928.2959545-1-liucong2@kylinos.cn>
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From:   David Airlie <airlied@redhat.com>
Date:   Wed, 30 Mar 2022 20:43:18 +1000
Message-ID: <CAMwc25r3ER2Mi4jo2W=VtZcusNhpsyhQ0Mjx+qHhmZAK-fSjZQ@mail.gmail.com>
Subject: Re: [PATCH v2] drm/qxl: fix qxl can't use in arm64
To:     Cong Liu <liucong2@kylinos.cn>
Cc:     =?UTF-8?Q?Christian_K=C3=B6nig?= <christian.koenig@amd.com>,
        airlied <airlied@linux.ie>, "Hoffmann, Gerd" <kraxel@redhat.com>,
        robin.murphy@arm.com,
        "open list:DRM DRIVER FOR QEMU'S CIRRUS DEVICE" 
        <virtualization@lists.linux-foundation.org>,
        "Vetter, Daniel" <daniel@ffwll.ch>,
        dri-devel <dri-devel@lists.freedesktop.org>, ray.huang@amd.com,
        "open list:DRM DRIVER FOR QXL VIRTUAL GPU" 
        <spice-devel@lists.freedesktop.org>,
        linux-kernel <linux-kernel@vger.kernel.org>
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I'd like to make sure this has no side effects on x86 guests, it
probably is safe, but keep an eye for regression reports.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Dave.

On Wed, Mar 30, 2022 at 8:20 PM Cong Liu <liucong2@kylinos.cn> wrote:
>
> any suggestions or extra test I can do now?
>
> Regards,
> Cong
>
> On 2022/3/25 15:45, Christian K=C3=B6nig wrote:
> > Am 24.03.22 um 11:49 schrieb Cong Liu:
> >> qxl use ioremap to map ram_header and rom, in the arm64 implementation=
,
> >> the device is mapped as DEVICE_nGnRE, it can not support unaligned
> >> access. and qxl is a virtual device, it can be treated more like RAM
> >> than actual MMIO registers. use ioremap_wc() replace it.
> >>
> >> Signed-off-by: Cong Liu <liucong2@kylinos.cn>
> >
> > Looks sane to me, but I'm really not involved enough to fully judge.
> >
> > Acked-by: Christian K=C3=B6nig <christian.koenig@amd.com>
> >
> >> ---
> >>   drivers/gpu/drm/qxl/qxl_kms.c | 4 ++--
> >>   drivers/gpu/drm/qxl/qxl_ttm.c | 4 ++--
> >>   2 files changed, 4 insertions(+), 4 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/qxl/qxl_kms.c
> >> b/drivers/gpu/drm/qxl/qxl_kms.c
> >> index 4dc5ad13f12c..a054e4a00fe8 100644
> >> --- a/drivers/gpu/drm/qxl/qxl_kms.c
> >> +++ b/drivers/gpu/drm/qxl/qxl_kms.c
> >> @@ -165,7 +165,7 @@ int qxl_device_init(struct qxl_device *qdev,
> >>            (int)qdev->surfaceram_size / 1024,
> >>            (sb =3D=3D 4) ? "64bit" : "32bit");
> >> -    qdev->rom =3D ioremap(qdev->rom_base, qdev->rom_size);
> >> +    qdev->rom =3D ioremap_wc(qdev->rom_base, qdev->rom_size);
> >>       if (!qdev->rom) {
> >>           pr_err("Unable to ioremap ROM\n");
> >>           r =3D -ENOMEM;
> >> @@ -183,7 +183,7 @@ int qxl_device_init(struct qxl_device *qdev,
> >>           goto rom_unmap;
> >>       }
> >> -    qdev->ram_header =3D ioremap(qdev->vram_base +
> >> +    qdev->ram_header =3D ioremap_wc(qdev->vram_base +
> >>                      qdev->rom->ram_header_offset,
> >>                      sizeof(*qdev->ram_header));
> >>       if (!qdev->ram_header) {
> >> diff --git a/drivers/gpu/drm/qxl/qxl_ttm.c
> >> b/drivers/gpu/drm/qxl/qxl_ttm.c
> >> index b2e33d5ba5d0..95df5750f47f 100644
> >> --- a/drivers/gpu/drm/qxl/qxl_ttm.c
> >> +++ b/drivers/gpu/drm/qxl/qxl_ttm.c
> >> @@ -82,13 +82,13 @@ int qxl_ttm_io_mem_reserve(struct ttm_device *bdev=
,
> >>       case TTM_PL_VRAM:
> >>           mem->bus.is_iomem =3D true;
> >>           mem->bus.offset =3D (mem->start << PAGE_SHIFT) + qdev->vram_=
base;
> >> -        mem->bus.caching =3D ttm_cached;
> >> +        mem->bus.caching =3D ttm_write_combined;
> >>           break;
> >>       case TTM_PL_PRIV:
> >>           mem->bus.is_iomem =3D true;
> >>           mem->bus.offset =3D (mem->start << PAGE_SHIFT) +
> >>               qdev->surfaceram_base;
> >> -        mem->bus.caching =3D ttm_cached;
> >> +        mem->bus.caching =3D ttm_write_combined;
> >>           break;
> >>       default:
> >>           return -EINVAL;
> >
>