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Date:   Tue, 29 Mar 2022 16:11:25 -0400
From:   =?utf-8?B?TsOtY29sYXMgRi4gUi4gQS4=?= Prado 
        <nfraprado@collabora.com>
To:     Matthias Brugger <matthias.bgg@gmail.com>
Cc:     Allen-KH Cheng <allen-kh.cheng@mediatek.com>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>,
        Project_Global_Chrome_Upstream_Group@mediatek.com,
        devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org,
        Chen-Yu Tsai <wenst@chromium.org>,
        Ryder Lee <ryder.lee@kernel.org>,
        Hui Liu <hui.liu@mediatek.com>
Subject: Re: [PATCH v4 03/22] arm64: dts: mt8192: Add gce node
Message-ID: <20220329201125.7l47kl7rmf4hjyvc@notapiano>
References: <20220318144534.17996-1-allen-kh.cheng@mediatek.com>
 <20220318144534.17996-4-allen-kh.cheng@mediatek.com>
 <a4935385-e7a5-8650-914b-73c699d2f8ca@gmail.com>
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On Wed, Mar 23, 2022 at 06:24:03PM +0100, Matthias Brugger wrote:
> 
> 
> On 18/03/2022 15:45, Allen-KH Cheng wrote:
> > Add gce node for mt8192 SoC.
> > 
> > Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
> > Reviewed-by: N?colas F. R. A. Prado <nfraprado@collabora.com>
> > Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> > ---
> >   arch/arm64/boot/dts/mediatek/mt8192.dtsi | 10 ++++++++++
> >   1 file changed, 10 insertions(+)
> > 
> > diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> > index 0f9f211ca986..9e1b563bebab 100644
> > --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> > +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> > @@ -6,6 +6,7 @@
> >   /dts-v1/;
> >   #include <dt-bindings/clock/mt8192-clk.h>
> > +#include <dt-bindings/gce/mt8192-gce.h>
> >   #include <dt-bindings/interrupt-controller/arm-gic.h>
> >   #include <dt-bindings/interrupt-controller/irq.h>
> >   #include <dt-bindings/pinctrl/mt8192-pinfunc.h>
> > @@ -552,6 +553,15 @@
> >   			#size-cells = <0>;
> >   		};
> > +		gce: mailbox@10228000 {
> > +			compatible = "mediatek,mt8192-gce";
> > +			reg = <0 0x10228000 0 0x4000>;
> > +			interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH 0>;
> > +			#mbox-cells = <3>;
> 
> #mbox-cells should be 2, right?

It should indeed. The mboxes property in patch 21 should also have the third
argument ("1") dropped.

Thanks,
N?colas