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Message-ID: <cfc6a2ac-1489-e221-f262-aab0ad5b701c@nvidia.com>
Date:   Thu, 31 Mar 2022 08:00:35 +0100
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Subject: Re: [Patch v2 2/4] dt-bindings: arm: tegra: Add bindins for
 nvidia,tegra-ccplex-cluster
Content-Language: en-US
To:     Sumit Gupta <sumitg@nvidia.com>, rafael@kernel.org,
        viresh.kumar@linaro.org, robh+dt@kernel.org, krzk+dt@kernel.org,
        treding@nvidia.com, linux-pm@vger.kernel.org,
        linux-tegra@vger.kernel.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org
Cc:     ksitaraman@nvidia.com, sanjayc@nvidia.com, bbasu@nvidia.com
References: <20220330143819.27476-1-sumitg@nvidia.com>
 <20220330143819.27476-3-sumitg@nvidia.com>
From:   Jon Hunter <jonathanh@nvidia.com>
In-Reply-To: <20220330143819.27476-3-sumitg@nvidia.com>
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Please update the subject to be something like ...

"dt-bindings: Document Tegra CCPLEX Cluster"

On 30/03/2022 15:38, Sumit Gupta wrote:
> The Tegra CCPLEX_CLUSTER area contains memory-mapped

Here you have CCPLEX_CLUSTER and ...

> registers that initiate CPU frequency/voltage transitions.
> 
> Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
> ---
>   .../tegra/nvidia,tegra-ccplex-cluster.yaml    | 52 +++++++++++++++++++
>   1 file changed, 52 insertions(+)
>   create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml
> 
> diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml
> new file mode 100644
> index 000000000000..74afa06f695e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml
> @@ -0,0 +1,52 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/arm/tegra/nvidia,tegra-ccplex-cluster.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: NVIDIA Tegra CPU_CLUSTER area device tree bindings

... here we have "CPU_CLUSTER" and ...

> +
> +maintainers:
> +  - Sumit Gupta <sumitg@nvidia.com>
> +  - Mikko Perttunen <mperttunen@nvidia.com>
> +  - Jon Hunter <jonathanh@nvidia.com>
> +  - Thierry Reding <thierry.reding@gmail.com>
> +
> +description: |+
> +  The Tegra CCPLEX_CLUSTER area contains memory-mapped

.. then we have CCPLEX_CLUSTER again. Let's have a consistent name such 
as 'CPU COMPLEX CLUSTER' (admittedly a mouthful but that is what is 
means). I don't think we need the '_' in the name.

> +  registers that initiate CPU frequency/voltage transitions.
> +
> +properties:
> +  $nodename:
> +    pattern: "ccplex@([0-9a-f]+)$"
> +
> +  compatible:
> +    enum:
> +      - nvidia,tegra186-ccplex-cluster
> +      - nvidia,tegra234-ccplex-cluster
> +
> +  reg:
> +    maxItems: 1
> +
> +  nvidia,bpmp:
> +    $ref: '/schemas/types.yaml#/definitions/phandle'
> +    description: |
> +      Specifies the bpmp node that needs to be queried to get

s/bpmp/BPMP

> +      operating point data for all CPUs.
> +
> +additionalProperties: true
> +
> +required:
> +  - compatible
> +  - reg
> +  - nvidia,bpmp
> +  - status
> +
> +examples:
> +  - |
> +    ccplex@e000000 {
> +      compatible = "nvidia,tegra234-ccplex-cluster";
> +      reg = <0x0 0x0e000000 0x0 0x5ffff>;
> +      nvidia,bpmp = <&bpmp>;
> +      status = "okay";
> +    };

-- 
nvpublic