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Message-ID: <319e976acb0a686e596b88520dbcda59c78afe9e.camel@pengutronix.de>
Subject: Re: [PATCH] soc: imx: gpcv2: keep i.MX8MM VPU-H1 bus clock active
From:   Lucas Stach <l.stach@pengutronix.de>
To:     Adam Ford <aford173@gmail.com>,
        linux-arm-kernel@lists.infradead.org
Cc:     tharvey@gateworks.com, aford@beaconembedded.com,
        Shawn Guo <shawnguo@kernel.org>,
        Sascha Hauer <s.hauer@pengutronix.de>,
        Pengutronix Kernel Team <kernel@pengutronix.de>,
        Fabio Estevam <festevam@gmail.com>,
        NXP Linux Team <linux-imx@nxp.com>,
        Peng Fan <peng.fan@nxp.com>, linux-kernel@vger.kernel.org
Date:   Thu, 31 Mar 2022 11:28:05 +0200
In-Reply-To: <20211120193916.1309236-1-aford173@gmail.com>
References: <20211120193916.1309236-1-aford173@gmail.com>
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Hi Adam, hi Shawn,

Am Samstag, dem 20.11.2021 um 13:39 -0600 schrieb Adam Ford:
> Enable the vpu-h1 clock when the domain is active because reading
> or writing to the VPU-H1 IP block cause the system to hang.
> 
> Fixes: 656ade7aa42a ("soc: imx: gpcv2: keep i.MX8M* bus clocks enabled")
> Signed-off-by: Adam Ford <aford173@gmail.com>
> 
> diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c
> index b8d52d8d29db..7b6dfa33dcb9 100644
> --- a/drivers/soc/imx/gpcv2.c
> +++ b/drivers/soc/imx/gpcv2.c
> @@ -734,6 +734,7 @@ static const struct imx_pgc_domain imx8mm_pgc_domains[] = {
>  			.map = IMX8MM_VPUH1_A53_DOMAIN,
>  		},
>  		.pgc   = BIT(IMX8MM_PGC_VPUH1),
> +		.keep_clocks = true,
>  	},
> 
I missed this patch and just stumbled across it when looking at the git
history. I don't think this patch is correct. The H1 GPC domain does
not even have clocks assigned in the DT, so there is nothing to keep
active. Also H1 is not a MIX domain, so it should not keep any bus
clocks active, that is the job of the VPUMIX domain.

While this patch is a no-op, as far as I can see, it still seems wrong
and I think it should be reverted.

Regards,
Lucas