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[2620:137:e000::1:20]) by mx.google.com with ESMTP id k129-20020a636f87000000b003816043eee6si152031pgc.219.2022.03.31.10.21.40; Thu, 31 Mar 2022 10:21:55 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234083AbiCaJcx convert rfc822-to-8bit (ORCPT + 99 others); Thu, 31 Mar 2022 05:32:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50126 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233978AbiCaJcq (ORCPT ); Thu, 31 Mar 2022 05:32:46 -0400 Received: from mout.kundenserver.de (mout.kundenserver.de [212.227.126.187]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 11E1462119; Thu, 31 Mar 2022 02:30:57 -0700 (PDT) Received: from mail-wr1-f41.google.com ([209.85.221.41]) by mrelayeu.kundenserver.de (mreue011 [213.165.67.113]) with ESMTPSA (Nemesis) id 1MRT6b-1nLC0R17ob-00NOzE; Thu, 31 Mar 2022 11:30:46 +0200 Received: by mail-wr1-f41.google.com with SMTP id w21so28295765wra.2; Thu, 31 Mar 2022 02:30:46 -0700 (PDT) X-Gm-Message-State: AOAM531+p9JRxXWPCupNmjuADuaWohp1e12ArJ8fnMSS4FhA4lA1beKk vw4alRW5T1123ik/lSskb7cXH7ZuJWv8as9h9Os= X-Received: by 2002:a5d:66ca:0:b0:203:fb72:a223 with SMTP id k10-20020a5d66ca000000b00203fb72a223mr3364174wrw.12.1648719041888; Thu, 31 Mar 2022 02:30:41 -0700 (PDT) MIME-Version: 1.0 References: <20220310195229.109477-1-nick.hawkins@hpe.com> <20220310195229.109477-9-nick.hawkins@hpe.com> In-Reply-To: From: Arnd Bergmann Date: Thu, 31 Mar 2022 11:30:25 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v3 09/10] arch: arm: boot: dts: Introduce HPE GXP Device tree To: "Hawkins, Nick" Cc: Arnd Bergmann , "Verdun, Jean-Marie" , Olof Johansson , "soc@kernel.org" , Rob Herring , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8BIT X-Provags-ID: V03:K1:gyI13vHiir4qvS+gHbaOuk1V7upswNbgvg4akROxuDFv4rlu2CD Tf/TBLjJnvOrv/FgpBF8QmJj3v4fBk/oOAswQOczVkA2dEQlCFk9i9hp0Bwow9G6RPEW7yO eLut5PvuBccWeLviFvpGGCG0C9I/hCMpctmWPZ3MEcHQjQPOBljZQL2f6eo1gFxs/KTAxjk YQmE6//1LbbmziWTyQQDg== X-UI-Out-Filterresults: notjunk:1;V03:K0:XJ0tSoddKgQ=:4u3TZgp1G4wkofKNDaiD5K QPORxCLAqlWP6hpLjLt+iotfOU6I0iAbHBdzgYC2mu/BdL3aSgnGqozjIYLS3wfURgs+TiA+D iPOhm21BvBfqcdibpLVPL6zc6gYDsd8PZZSdMefq/5Vp3yrBvCL/Jty3yJ4z9I4VmqgBWtjPk 76Lz3VK0Ig+/mIKz1CNcgXco/g5aeMkhc97uSQuVwD1DyUohneJuMGK4HVoReoqTQxt1ktKxo 2T0hSiU66O2CNVfAYn197hVdeZ9q7sNi/2aSciMKE0cD6gPJ2FEQX4jZ6VOX5+UF4mlmO6wFg 9lAj1MCzWbdayVEVX6KugGmR/kRweyEiWSVDiZT1HS0AaGdIi8kR5sd0b18DBt0+tVRS0c5Lv zIxSxToUSN2f7qwe2cCzi346P+BBkVhFkOuTIVZpLb2QYHQVV7Nbxb86pMDZ9VLzkL4ziqkV/ gp52U0e/4LiEeHn+9t20h2yQ8OM7ixQze6UKCwXJxAFyz5nzwfYCLPtSvl9wm1N08UzeIzAf0 stMMXKn+rX0/WOOQiXO/dhFuly9Ecj9RsOgG9PbtE/tyyZqjBO8H6ITDec3NZNPi6+1WxorXt qVZPbO4vm6sYeGGHfspIwQZuntZar7FFw3qYRu5W40uyWAxOvedp27EPbV3MGAb26LEekkIYd aWi6AWQYDitWGQzmMGS9RyLNrxmbmgVpadTolENuuqtG8vVkHDHsnnX4j4Eu5M0D8CoyKVKV+ Nr3k1/FQ72nL/A8hoaV0hDGHVbrjNsoIRqfp9ZYDQUHAmDUGRR8Um7AhN+eGUtGYSB4HCZ4jG NA6Jfjnn3jn3TihoKb1XHjgxolM/VH+Ot+cilSuixRX1lf7bKd26Sbn2F4XBj0HHR4o1x72 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Mar 31, 2022 at 12:27 AM Hawkins, Nick wrote: > On Tue, Mar 29, 2022 at 9:38 PM Hawkins, Nick > wrote: > > >> I am in the process of rewriting the timer driver for Linux but have hit a dilemma and I am looking for some direction. The registers that represent the watchdog timer, and timer all lay in the same register region and they are spread out to the point where there are other controls in the same area. > > > >> For instance with our watchdog controls we have: > > > >> @90 the countdown value > >> @96 the configuration > > > >> And for our timer we have: > >> @80 the countdown value > >> @94 the configuration > >> @88 this is actually our timestamp register but is being included in with the timer driver currently to call clocksource_mmio_init. > > > >> What would be your recommendation for this? I was considering creating a gxp-clock that specifically points at the timestamp register but I still have the issue with gxp-timer and gxp-wdt being spread across the same area of registers. > > > I think this is most commonly done using a 'syscon' node, have a look at the files listed by > > I found an example and copied it although I have a couple questions when it comes to actually coding it. Can that be here or should I post these questions in the patch that actually concern the file? > > st: timer@80 { > compatible = "hpe,gxp-timer","syscon","simple-mfd"; > reg = <0x80 0x16>; > interrupts = <0>; > interrupt-parent = <&vic0>; > clocks = <&ppuclk>; > clock-names = "ppuclk"; > clock-frequency = <400000000>; > > watchdog { > compatible = "hpe,gxp-wdt"; > }; > }; I'd have to study the other examples myself to see what is most common. My feeling would be that it's better to either have a "hpe,gxp-timer" parent device with a watchdog child but no syscon, or to have a syscon/simple-mfd parent with both the timer and the watchdog as children. Arnd