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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: SN6PR12MB4685.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 9e099812-6e11-4aef-a6a6-08da133a5fb3 X-MS-Exchange-CrossTenant-originalarrivaltime: 31 Mar 2022 17:17:46.0205 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: r4h2g+PWuxxwwPf+0LYkzEY4+qLz8ZExjnF4W6rDazjF0v+a4x1uaxfuCuwnHO5yWj2rZrsEhk5qqEGTtpmVlw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR12MB1808 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org [AMD Official Use Only] -----Original Message----- From: Bilbao, Carlos =20 Sent: Thursday, March 31, 2022 12:39 PM To: bp@alien8.de Cc: tglx@linutronix.de; mingo@redhat.com; dave.hansen@linux.intel.com; x86@= kernel.org; Ghannam, Yazen ; linux-kernel@vger.kerne= l.org; linux-edac@vger.kernel.org; bilbao@vt.edu; Bilbao, Carlos Subject: [PATCH v2 2/2] x86/mce: Add messages to describe panic machine err= ors on AMD's MCEs grading When a machine error is graded as PANIC by AMD grading logic, the MCE handl= er calls mce_panic(). The notification chain does not come into effect so t= he AMD EDAC driver does not decode the errors. In these cases, the messages= displayed to the user are more cryptic and miss information that might be = relevant, like the context in which the error took place. Fix the above issue including messages on AMD's grading logic for machine e= rrors graded as PANIC. Signed-off-by: Carlos Bilbao --- arch/x86/kernel/cpu/mce/severity.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/x86/kernel/cpu/mce/severity.c b/arch/x86/kernel/cpu/mce/s= everity.c index 4d52eef21230..ea4b9407bbad 100644 --- a/arch/x86/kernel/cpu/mce/severity.c +++ b/arch/x86/kernel/cpu/mce/severity.c @@ -307,6 +307,7 @@ static noinstr int error_context(struct mce *m, struct = pt_regs *regs) static noinstr int mce_severity_amd(struct mce *m, struct p= t_regs *regs, char **msg, bool is_excp) { int ret; + char *panic_msg; I suggest char *panic_msg =3D NULL; Simply because its stack-based and a non-null value may get assigned to *ms= g after the amd_severity: label.=20 =20 /* * Default return value: Action required, the error must be handled @@ -3= 16,6 +317,7 @@ static noinstr int mce_severity_amd(struct mce *m, struct pt= _regs *regs, char ** =20 /* Processor Context Corrupt, no need to fumble too much, die! */ if (m->status & MCI_STATUS_PCC) { + panic_msg =3D "Processor Context Corrupt"; ret =3D MCE_PANIC_SEVERITY; goto amd_severity; } @@ -339,16 +341,21 @@ static noinstr int mce_severity_amd(struct mce *m, st= ruct pt_regs *regs, char ** =20 if (((m->status & MCI_STATUS_OVER) && !mce_flags.overflow_recov) || !mce_flags.succor) { + panic_msg =3D "Uncorrected unrecoverable error"; ret =3D MCE_PANIC_SEVERITY; goto amd_severity; } =20 if (error_context(m, regs) =3D=3D IN_KERNEL) { + panic_msg =3D "Uncorrected error in kernel context"; ret =3D MCE_PANIC_SEVERITY; } =20 amd_severity: =20 + if (msg && panic_msg) + *msg =3D panic_msg; + return ret; } =20 -- 2.31.1