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[188.155.201.27]) by smtp.gmail.com with ESMTPSA id ch26-20020a0564021bda00b00418f99695f0sm202380edb.23.2022.03.31.13.21.24 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 31 Mar 2022 13:21:25 -0700 (PDT) Message-ID: <84d1e5b6-caa5-cf98-a4b2-2f1ca738b795@linaro.org> Date: Thu, 31 Mar 2022 22:21:24 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.7.0 Subject: Re: [PATCH v12 4/9] dt-bindings: clock: Add bindings for SP7021 clock driver Content-Language: en-US To: Qin Jian , krzysztof.kozlowski@canonical.com Cc: robh+dt@kernel.org, mturquette@baylibre.com, sboyd@kernel.org, tglx@linutronix.de, maz@kernel.org, p.zabel@pengutronix.de, linux@armlinux.org.uk, arnd@arndb.de, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org References: From: Krzysztof Kozlowski In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 31/03/2022 10:29, Qin Jian wrote: > Add documentation to describe Sunplus SP7021 clock driver bindings. > > Signed-off-by: Qin Jian > --- > Move 'reg' after 'compatible' > --- > .../bindings/clock/sunplus,sp7021-clkc.yaml | 39 ++++++ > MAINTAINERS | 2 + > include/dt-bindings/clock/sp-sp7021.h | 112 ++++++++++++++++++ > 3 files changed, 153 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/sunplus,sp7021-clkc.yaml > create mode 100644 include/dt-bindings/clock/sp-sp7021.h > > diff --git a/Documentation/devicetree/bindings/clock/sunplus,sp7021-clkc.yaml b/Documentation/devicetree/bindings/clock/sunplus,sp7021-clkc.yaml > new file mode 100644 > index 000000000..41e73a088 > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/sunplus,sp7021-clkc.yaml > @@ -0,0 +1,39 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +# Copyright (C) Sunplus Co., Ltd. 2021 > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/sunplus,sp7021-clkc.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Sunplus SP7021 SoC Clock Controller Binding > + > +maintainers: > + - Qin Jian > + > +properties: > + compatible: > + const: sunplus,sp7021-clkc > + > + reg: > + maxItems: 1 > + > + "#clock-cells": > + const: 1 > + > +required: > + - compatible > + - reg > + - "#clock-cells" > + > +additionalProperties: false > + > +examples: > + - | > + > + clkc: clock-controller@9c000000 { > + compatible = "sunplus,sp7021-clkc"; > + reg = <0x9c000000 0x280>; > + #clock-cells = <1>; > + }; > + > +... > diff --git a/MAINTAINERS b/MAINTAINERS > index 26066f199..5d8b420d0 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -2744,8 +2744,10 @@ L: linux-arm-kernel@lists.infradead.org (moderated for mon-subscribers) > S: Maintained > W: https://sunplus-tibbo.atlassian.net/wiki/spaces/doc/overview > F: Documentation/devicetree/bindings/arm/sunplus,sp7021.yaml > +F: Documentation/devicetree/bindings/clock/sunplus,sp7021-clkc.yaml > F: Documentation/devicetree/bindings/reset/sunplus,reset.yaml > F: drivers/reset/reset-sunplus.c > +F: include/dt-bindings/clock/sp-sp7021.h > F: include/dt-bindings/reset/sp-sp7021.h > > ARM/Synaptics SoC support > diff --git a/include/dt-bindings/clock/sp-sp7021.h b/include/dt-bindings/clock/sp-sp7021.h > new file mode 100644 > index 000000000..45dac6de8 > --- /dev/null > +++ b/include/dt-bindings/clock/sp-sp7021.h > @@ -0,0 +1,112 @@ > +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ > +/* > + * Copyright (C) Sunplus Technology Co., Ltd. > + * All rights reserved. > + */ > +#ifndef _DT_BINDINGS_CLOCK_SUNPLUS_SP7021_H > +#define _DT_BINDINGS_CLOCK_SUNPLUS_SP7021_H > + > +#define XTAL 27000000 > + > +/* plls */ > +#define PLL_A 0 > +#define PLL_E 1 > +#define PLL_E_2P5 2 > +#define PLL_E_25 3 > +#define PLL_E_112P5 4 > +#define PLL_F 5 > +#define PLL_TV 6 > +#define PLL_TV_A 7 > +#define PLL_SYS 8 > + > +/* gates: mo_clken0 ~ mo_clken9 */ > +#define CLK_SYSTEM 0x10 > +#define CLK_RTC 0x12 YAML looks ok, but here comment from Arnd also applies. These should be regular decimal numbers incremented by one. Best regards, Krzysztof