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Message-ID: <34c64163-d1c8-22b5-1766-3e7493ad306b@collabora.com>
Date:   Thu, 31 Mar 2022 23:57:33 +0300
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Subject: Re: [PATCH v4 3/5] x86/PCI: Add $IRT PIRQ routing table support
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To:     "Maciej W. Rozycki" <macro@orcam.me.uk>,
        Bjorn Helgaas <bhelgaas@google.com>,
        Thomas Gleixner <tglx@linutronix.de>,
        Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
        "H. Peter Anvin" <hpa@zytor.com>
Cc:     Arnd Bergmann <arnd@kernel.org>, Nikolai Zhubr <zhubr.2@gmail.com>,
        Michal Necasek <mnecasek@yahoo.com>,
        Linus Torvalds <torvalds@linux-foundation.org>, x86@kernel.org,
        linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org
References: <alpine.DEB.2.21.2203301619340.22465@angie.orcam.me.uk>
 <alpine.DEB.2.21.2203302228410.9038@angie.orcam.me.uk>
From:   Dmitry Osipenko <dmitry.osipenko@collabora.com>
In-Reply-To: <alpine.DEB.2.21.2203302228410.9038@angie.orcam.me.uk>
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Precedence: bulk

On 3/31/22 10:11, Maciej W. Rozycki wrote:
> Handle the $IRT PCI IRQ Routing Table format used by AMI for its BCP 
> (BIOS Configuration Program) external tool meant for tweaking BIOS 
> structures without the need to rebuild it from sources[1].
> 
> The $IRT format has been invented by AMI before Microsoft has come up 
> with its $PIR format and a $IRT table is therefore there in some systems 
> that lack a $PIR table, such as the DataExpert EXP8449 mainboard based 
> on the ALi FinALi 486 chipset (M1489/M1487), which predates DMI 2.0 and 
> cannot therefore be easily identified at run time.
> 
> Unlike with the $PIR format there is no alignment guarantee as to the 
> placement of the $IRT table, so scan the whole BIOS area bytewise.
> 
> Credit to Michal Necasek for helping me chase documentation for the 
> format.
> 
> References:
> 
> [1] "What is BCP? - AMI", <https://www.ami.com/what-is-bcp/>
> 
> Signed-off-by: Maciej W. Rozycki <macro@orcam.me.uk>
> Cc: Michal Necasek <mnecasek@yahoo.com>
> ---
> Changes from v3:
> 
> - Correct the BIOS memory scan such as to verify that the PCI IRQ Routing
>   Table header as well as individual slot entries are all wholly contained 
>   within the BIOS memory area.
> 
> - Following commit 5224f7909617 ("treewide: Replace zero-length arrays 
>   with flexible-array members") also make `slots' in `irt_routing_table' a 
>   flexible-array member.
> 
> New change in v3.
> ---
>  arch/x86/include/asm/pci_x86.h |    9 ++++
>  arch/x86/pci/irq.c             |   76 +++++++++++++++++++++++++++++++++++++++++
>  2 files changed, 85 insertions(+)

Tested-by: Dmitry Osipenko <dmitry.osipenko@collabora.com> # crosvm