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[2620:137:e000::1:20]) by mx.google.com with ESMTP id v12-20020a17090a4ecc00b001c638bda95bsi5962626pjl.6.2022.04.02.08.54.56; Sat, 02 Apr 2022 08:55:10 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344106AbiDAH6R (ORCPT + 99 others); Fri, 1 Apr 2022 03:58:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54120 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344157AbiDAH55 (ORCPT ); Fri, 1 Apr 2022 03:57:57 -0400 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7F0FB1AA8F5; Fri, 1 Apr 2022 00:56:06 -0700 (PDT) Received: from ip5b412258.dynamic.kabel-deutschland.de ([91.65.34.88] helo=diego.localnet) by gloria.sntech.de with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1naC8T-0006pi-L5; Fri, 01 Apr 2022 09:55:57 +0200 From: Heiko =?ISO-8859-1?Q?St=FCbner?= To: Johan Jonker , zhangqing@rock-chips.com, Stephen Boyd Cc: robh+dt@kernel.org, krzk+dt@kernel.org, mturquette@baylibre.com, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v3 1/2] dt-bindings: clock: convert rockchip,rk3188-cru.txt to YAML Date: Fri, 01 Apr 2022 09:55:55 +0200 Message-ID: <3107512.vfdyTQepKt@diego> In-Reply-To: <20220331225134.7A0A9C340ED@smtp.kernel.org> References: <20220329111323.3569-1-jbx6244@gmail.com> <20220331225134.7A0A9C340ED@smtp.kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_NONE, T_SCC_BODY_TEXT_LINE,T_SPF_HELO_TEMPERROR autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Stephen, Am Freitag, 1. April 2022, 00:51:32 CEST schrieb Stephen Boyd: > Quoting Johan Jonker (2022-03-29 04:13:22) > > diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3188-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rk3188-cru.yaml > > new file mode 100644 > > index 000000000..ddd7e46af > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3188-cru.yaml > > @@ -0,0 +1,78 @@ > > +# SPDX-License-Identifier: GPL-2.0 > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/clock/rockchip,rk3188-cru.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Rockchip RK3188/RK3066 Clock and Reset Unit (CRU) > > + > > +maintainers: > > + - Elaine Zhang > > + - Heiko Stuebner > > + > > +description: | > > + The RK3188/RK3066 clock controller generates and supplies clocks to various > > + controllers within the SoC and also implements a reset controller for SoC > > + peripherals. > > + Each clock is assigned an identifier and client nodes can use this identifier > > + to specify the clock which they consume. All available clocks are defined as > > + preprocessor macros in the dt-bindings/clock/rk3188-cru.h and > > + dt-bindings/clock/rk3066-cru.h headers and can be used in device tree sources. > > + Similar macros exist for the reset sources in these files. > > + There are several clocks that are generated outside the SoC. It is expected > > + that they are defined using standard clock bindings with following > > + clock-output-names: > > + - "xin24m" - crystal input - required > > + - "xin32k" - RTC clock - optional > > + - "xin27m" - 27mhz crystal input on RK3066 - optional > > + - "ext_hsadc" - external HSADC clock - optional > > + - "ext_cif0" - external camera clock - optional > > + - "ext_rmii" - external RMII clock - optional > > + - "ext_jtag" - external JTAG clock - optional > > I'd expect all these clks here to be inputs to this node. The optional clocks are all part of a circular dependency. So for example xin32k normally is generated by the pmic and fed back into the system, so to get xin32k, we need the pmic to probe, which needs i2c, which in turn already needs the clock controller. Or optional clocks may not be available at all. So for the past years we already relied on the clock-system's self adaptation if a clock becomes available at some point during later boot and hence do not have those in a clocks-property. Heiko