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[2620:137:e000::1:18]) by mx.google.com with ESMTPS id o3-20020a170903210300b00153b2d165c7si3386867ple.463.2022.04.04.17.08.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 Apr 2022 17:08:43 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) client-ip=2620:137:e000::1:18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id EDCFC65D3B; Mon, 4 Apr 2022 16:41:44 -0700 (PDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1383533AbiDDVdk (ORCPT + 99 others); Mon, 4 Apr 2022 17:33:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36852 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1380643AbiDDUso (ORCPT ); Mon, 4 Apr 2022 16:48:44 -0400 Received: from vps-vb.mhejs.net (vps-vb.mhejs.net [37.28.154.113]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3B3D713E9A; Mon, 4 Apr 2022 13:46:47 -0700 (PDT) Received: from MUA by vps-vb.mhejs.net with esmtps (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 (Exim 4.94.2) (envelope-from ) id 1nbTav-0003dN-Sm; Mon, 04 Apr 2022 22:46:37 +0200 Message-ID: Date: Mon, 4 Apr 2022 22:46:32 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.7.0 Subject: Re: [PATCH 5/8] KVM: SVM: Re-inject INT3/INTO instead of retrying the instruction Content-Language: en-US To: Sean Christopherson Cc: Maxim Levitsky , Paolo Bonzini , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Joerg Roedel , kvm@vger.kernel.org, linux-kernel@vger.kernel.org References: <20220402010903.727604-1-seanjc@google.com> <20220402010903.727604-6-seanjc@google.com> From: "Maciej S. Szmigiero" In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,NICE_REPLY_A, RDNS_NONE,SPF_HELO_NONE,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 4.04.2022 21:54, Sean Christopherson wrote: > On Mon, Apr 04, 2022, Sean Christopherson wrote: >> On Mon, Apr 04, 2022, Maciej S. Szmigiero wrote: >>>>>> index 47e7427d0395..a770a1c7ddd2 100644 >>>>>> --- a/arch/x86/kvm/svm/svm.h >>>>>> +++ b/arch/x86/kvm/svm/svm.h >>>>>> @@ -230,8 +230,8 @@ struct vcpu_svm { >>>>>> bool nmi_singlestep; >>>>>> u64 nmi_singlestep_guest_rflags; >>>>>> - unsigned int3_injected; >>>>>> - unsigned long int3_rip; >>>>>> + unsigned soft_int_injected; >>>>>> + unsigned long soft_int_linear_rip; >>>>>> /* optional nested SVM features that are enabled for this guest */ >>>>>> bool nrips_enabled : 1; >>>>> >>>>> >>>>> I mostly agree with this patch, but think that it doesn't address the >>>>> original issue that Maciej wanted to address: >>>>> >>>>> Suppose that there is *no* instruction in L2 code which caused the software >>>>> exception, but rather L1 set arbitrary next_rip, and set EVENTINJ to software >>>>> exception with some vector, and that injection got interrupted. >>>>> >>>>> I don't think that this code will support this. >>>> >>>> Argh, you're right. Maciej's selftest injects without an instruction, but it doesn't >>>> configure the scenario where that injection fails due to an exception+VM-Exit that >>>> isn't intercepted by L1 and is handled by L0. The event_inj test gets the coverage >>>> for the latter, but always has a backing instruction. >>> >>> Still reviewing the whole patch set, but want to clear this point quickly: >>> The selftest does have an implicit intervening NPF (handled by L0) while >>> injecting the first L1 -> L2 event. >> >> I'll do some debug to figure out why the test passes for me. I'm guessing I either >> got lucky, e.g. IDT was faulted in already, or I screwed up and the test doesn't >> actually pass. > > Well that was easy. My code is indeed flawed and skips the wrong instruction, > the skipped instruction just so happens to be a (spurious?) adjustment of RSP. The > L2 guest function never runs to completion and so the "bad" RSP is never consumed. > > KVM: incomplete injection for L2, vector 32 @ 401c70. next_rip = 0 > KVM: injecting for L2, vector 0 @ 401c70. next_rip = 401c74 > > 0000000000401c70 : > 401c70: 48 83 ec 08 sub $0x8,%rsp > 401c74: 83 3d 75 a7 0e 00 01 cmpl $0x1,0xea775(%rip) # 4ec3f0 > 401c7b: 74 1e je 401c9b > 401c7d: 45 31 c0 xor %r8d,%r8d > 401c80: b9 32 00 00 00 mov $0x32,%ecx > 401c85: ba 90 40 4b 00 mov $0x4b4090,%edx > 401c8a: 31 c0 xor %eax,%eax > 401c8c: be 02 00 00 00 mov $0x2,%esi > 401c91: bf 02 00 00 00 mov $0x2,%edi > 401c96: e8 05 ae 00 00 call 40caa0 > 401c9b: 0f 01 d9 vmmcall > 401c9e: 0f 0b ud2 > 401ca0: 83 3d 4d a7 0e 00 01 cmpl $0x1,0xea74d(%rip) # 4ec3f4 > 401ca7: 74 1e je 401cc7 > 401ca9: 45 31 c0 xor %r8d,%r8d > 401cac: b9 36 00 00 00 mov $0x36,%ecx > 401cb1: ba b8 40 4b 00 mov $0x4b40b8,%edx > 401cb6: 31 c0 xor %eax,%eax > 401cb8: be 02 00 00 00 mov $0x2,%esi > 401cbd: bf 02 00 00 00 mov $0x2,%edi > 401cc2: e8 d9 ad 00 00 call 40caa0 > 401cc7: f4 hlt > 401cc8: 48 83 c4 08 add $0x8,%rsp > 401ccc: c3 ret > 401ccd: 0f 1f 00 nopl (%rax) > > I don't see why the compiler is creating room for a single variable, but it doesn't > really matter, the easiest way to detect this bug is to assert that the return RIP > in the INT 0x20 handler points at l2_guest_code, e.g. this fails: > > diff --git a/tools/testing/selftests/kvm/x86_64/svm_nested_soft_inject_test.c b/tools/testing/selftests/kvm/x86_64/svm_nested_soft_inject_test.c > index d39be5d885c1..257aa2280b5c 100644 > --- a/tools/testing/selftests/kvm/x86_64/svm_nested_soft_inject_test.c > +++ b/tools/testing/selftests/kvm/x86_64/svm_nested_soft_inject_test.c > @@ -40,9 +40,13 @@ static void guest_bp_handler(struct ex_regs *regs) > } > > static unsigned int int_fired; > +static void l2_guest_code(void); > + > static void guest_int_handler(struct ex_regs *regs) > { > int_fired++; > + GUEST_ASSERT_2(regs->rip == (unsigned long)l2_guest_code, > + regs->rip, (unsigned long)l2_guest_code); > } > > static void l2_guest_code(void) It totally makes sense to add the above as an additional assert to the self test - the more checks the test have the better at catching bugs it is. Thanks, Maciej