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Bae" To: linux-kselftest@vger.kernel.org, shuah@kernel.org, linux-kernel@vger.kernel.org Cc: dave.hansen@linux.intel.com, tglx@linutronix.de, bp@suse.de, chang.seok.bae@intel.com Subject: [PATCH 2/2] selftests/x86/amx: Fix the test to avoid failure when AMX is unavailable Date: Fri, 1 Apr 2022 15:10:14 -0700 Message-Id: <20220401221014.13556-3-chang.seok.bae@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220401221014.13556-1-chang.seok.bae@intel.com> References: <20220401221014.13556-1-chang.seok.bae@intel.com> X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,RDNS_NONE,SPF_HELO_NONE,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org When a CPU does not have AMX, the test fails. But this is wrong as it should be runnable regardless. Skip the test instead. Reported-by: Thomas Gleixner Fixes: 6a3e0651b4a ("selftests/x86/amx: Add test cases for AMX state management") Signed-off-by: Chang S. Bae Cc: linux-kselftest@vger.kernel.org Cc: linux-kernel@vger.kernel.org --- tools/testing/selftests/x86/amx.c | 42 +++++++++++++++++++++++-------- 1 file changed, 31 insertions(+), 11 deletions(-) diff --git a/tools/testing/selftests/x86/amx.c b/tools/testing/selftests/x86/amx.c index 3615ef4a48bb..14abb6072a7d 100644 --- a/tools/testing/selftests/x86/amx.c +++ b/tools/testing/selftests/x86/amx.c @@ -106,6 +106,12 @@ static void clearhandler(int sig) #define CPUID_LEAF1_ECX_XSAVE_MASK (1 << 26) #define CPUID_LEAF1_ECX_OSXSAVE_MASK (1 << 27) + +static struct { + unsigned xsave: 1; + unsigned osxsave: 1; +} cpuinfo; + static inline void check_cpuid_xsave(void) { uint32_t eax, ebx, ecx, edx; @@ -118,10 +124,8 @@ static inline void check_cpuid_xsave(void) eax = 1; ecx = 0; cpuid(&eax, &ebx, &ecx, &edx); - if (!(ecx & CPUID_LEAF1_ECX_XSAVE_MASK)) - fatal_error("cpuid: no CPU xsave support"); - if (!(ecx & CPUID_LEAF1_ECX_OSXSAVE_MASK)) - fatal_error("cpuid: no OS xsave support"); + cpuinfo.xsave = !!(ecx & CPUID_LEAF1_ECX_XSAVE_MASK); + cpuinfo.osxsave = !!(ecx & CPUID_LEAF1_ECX_OSXSAVE_MASK); } static uint32_t xbuf_size; @@ -161,14 +165,31 @@ static void check_cpuid_xtiledata(void) * eax: XTILEDATA state component size * ebx: XTILEDATA state component offset in user buffer */ - if (!eax || !ebx) - fatal_error("xstate cpuid: invalid tile data size/offset: %d/%d", - eax, ebx); - xtiledata.size = eax; xtiledata.xbuf_offset = ebx; } +static bool amx_available(void) +{ + check_cpuid_xsave(); + if (!cpuinfo.xsave) { + printf("[SKIP]\tcpuid: no CPU xsave support\n"); + return false; + } else if (!cpuinfo.osxsave) { + printf("[SKIP]\tcpuid: no OS xsave support\n"); + return false; + } + + check_cpuid_xtiledata(); + if (!xtiledata.size || !xtiledata.xbuf_offset) { + printf("[SKIP]\txstate cpuid: no tile data (size/offset: %d/%d)\n", + xtiledata.size, xtiledata.xbuf_offset); + return false; + } + + return true; +} + /* The helpers for managing XSAVE buffer and tile states: */ struct xsave_buffer *alloc_xbuf(void) @@ -826,9 +847,8 @@ static void test_context_switch(void) int main(void) { - /* Check hardware availability at first */ - check_cpuid_xsave(); - check_cpuid_xtiledata(); + if (!amx_available()) + return 0; init_stashed_xsave(); sethandler(SIGILL, handle_noperm, 0); -- 2.17.1