Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
Message-ID: <5d2f23a5-e8a9-6be1-cc91-0a80bad68f3a@quicinc.com>
Date:   Tue, 5 Apr 2022 10:35:03 +0530
MIME-Version: 1.0
User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101
 Thunderbird/91.6.1
Subject: Re: [PATCH v5 3/3] arm64: dts: qcom: sc7280: add lpass lpi pin
 controller node
Content-Language: en-US
To:     Stephen Boyd <swboyd@chromium.org>, <agross@kernel.org>,
        <bjorn.andersson@linaro.org>, <devicetree@vger.kernel.org>,
        <dianders@chromium.org>, <judyhsiao@chromium.org>,
        <linux-arm-msm@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
        <robh+dt@kernel.org>, <srinivas.kandagatla@linaro.org>
CC:     Venkata Prasad Potturu <quic_potturu@quicinc.com>
References: <1647863959-3289-1-git-send-email-quic_srivasam@quicinc.com>
 <1647863959-3289-4-git-send-email-quic_srivasam@quicinc.com>
 <CAE-0n50xoWpd8S82W=xjbKBjqD-bgyMM8b539PV83=fHBQC7yw@mail.gmail.com>
From:   Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Organization: Qualcomm
In-Reply-To: <CAE-0n50xoWpd8S82W=xjbKBjqD-bgyMM8b539PV83=fHBQC7yw@mail.gmail.com>
Content-Type: text/plain; charset="UTF-8"; format=flowed
Content-Transfer-Encoding: 7bit
Precedence: bulk


On 3/22/2022 1:56 AM, Stephen Boyd wrote:
> Quoting Srinivasa Rao Mandadapu (2022-03-21 04:59:19)
>> Add LPASS LPI pinctrl node required for Audio functionality on sc7280
>> based platforms.
>>
>> Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
>> Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
>> Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
>> ---
>>   arch/arm64/boot/dts/qcom/sc7280.dtsi | 147 +++++++++++++++++++++++++++++++++++
>>   1 file changed, 147 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> index 8d8cec5..499299a 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> @@ -1987,6 +1987,153 @@
>>                          qcom,bcm-voters = <&apps_bcm_voter>;
>>                  };
>>
>> +               lpass_tlmm: pinctrl@33c0000 {
>> +                       compatible = "qcom,sc7280-lpass-lpi-pinctrl";
>> +                       reg = <0 0x33c0000 0x0 0x20000>,
>> +                               <0 0x3550000 0x0 0x10000>;
>> +                       gpio-controller;
>> +                       #gpio-cells = <2>;
>> +                       gpio-ranges = <&lpass_tlmm 0 0 15>;
>> +
>> +                       #clock-cells = <1>;
>> +
>> +                       dmic01_active: dmic01-active {
>> +                               clk {
>> +                                       pins = "gpio6";
>> +                                       function = "dmic1_clk";
>> +                                       drive-strength = <8>;
>> +                                       output-high;
> The rule of thumb is that drive strength, output/input, and bias
> properties should be in the board file, because the board layout decides
> the drive strength, the output level could be inverted on the board, and
> the biasing could be done externally (or not) via pullup/pulldowns on
> the net. The gpio driver should be able to make pins into inputs
> automatically when the gpio is requested and used so having input or
> output is typically wrong and should be handled by the consumer driver.
Okay. will re arrange accordingly and remove output-high property.
>
>> +                               };
>> +
>> +                               data {
>> +                                       pins = "gpio7";
>> +                                       function = "dmic1_data";
> So in the end I'd expect to only see pins and function properties in the
> SoC dtsi file.
Okay.
>
>> +                                       drive-strength = <8>;
>> +                               };
>> +                       };
>> +
>> +                       dmic01_sleep: dmic01-sleep {
>> +                               clk {
>> +                                       pins = "gpio6";
>> +                                       function = "dmic1_clk";