Date: Tue, 01 May 2007 17:59:18 -0600
From: Robert Hancock <hancockr@shaw.ca>
Subject: Re: [PATCH] support PCI MCFG space on Intel i915 bridges
In-reply-to: <200705011627.14948.jesse.barnes@intel.com>
To: Jesse Barnes <jesse.barnes@intel.com>
Cc: linux-kernel@vger.kernel.org, Andrew Morton <akpm@linux-foundation.org>
Message-id: <4637D456.3040303@shaw.ca>
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Jesse Barnes wrote:
> On Monday, April 30, 2007 4:20 pm Robert Hancock wrote:
>>> Right, but you patch should obsolete this stuff anyway.  I'll test
>>> it out in the next few days.
>> We likely still want this chipset-specific support, it will catch the
>> case where the MCFG table lists a location which is reserved in ACPI
>> but the chipset was actually programmed to a different location
>> entirely, which I seem to remember someone mentioning was actually
>> the case on some boards..
> 
> Yeah, I suppose that's true.  So maybe your new checking code should 
> leverage the stuff in mmconfig-shared.c to check against the register 
> values like Olivier mentioned?

The patch I sent takes the MCFG address from the chipset registers for 
known chipsets, or the ACPI MCFG table otherwise. Either way, it will 
verify that the memory range is reserved in ACPI.

-- 
Robert Hancock      Saskatoon, SK, Canada
To email, remove "nospam" from hancockr@nospamshaw.ca
Home Page: http://www.roberthancock.com/

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