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Date:   Tue, 5 Apr 2022 16:25:00 -0700
From:   Matthias Kaehlcke <mka@chromium.org>
To:     Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Cc:     agross@kernel.org, bjorn.andersson@linaro.org, robh+dt@kernel.org,
        linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org, quic_rohitkr@quicinc.com,
        srinivas.kandagatla@linaro.org, dianders@chromium.org,
        swboyd@chromium.org, judyhsiao@chromium.org,
        Venkata Prasad Potturu <quic_potturu@quicinc.com>
Subject: Re: [PATCH v6 2/3] arm64: dts: qcom: sc7280: Add lpass cpu node
Message-ID: <YkzPzP7kYgaYKwcQ@google.com>
References: <1649157220-29304-1-git-send-email-quic_srivasam@quicinc.com>
 <1649157220-29304-3-git-send-email-quic_srivasam@quicinc.com>
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On Tue, Apr 05, 2022 at 04:43:39PM +0530, Srinivasa Rao Mandadapu wrote:
> Add lpass cpu node for audio on sc7280 based platforms.
> 
> Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
> Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
> Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
> ---
>  arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 28 ++++++++++++++
>  arch/arm64/boot/dts/qcom/sc7280.dtsi     | 63 ++++++++++++++++++++++++++++++++
>  2 files changed, 91 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
> index 83c76b2..e3d8cbf 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
> @@ -273,6 +273,34 @@
>  	modem-init;
>  };
>  
> +&lpass_cpu {
> +	status = "okay";
> +
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&sec_mi2s_data0>, <&sec_mi2s_sclk>, <&sec_mi2s_ws>;
> +
> +	mi2s-secondary@1 {

in line with an earlier comment, the primary/secondary terminology seem to
reflect how things are called in the datasheet (which only talks about a
primary/secondary master clock, otherwise about mi2sN). How about calling
these nodes 'dai-link@N' as in the binding (and a bunch of other
boards/SoCs)?

> +		reg = <MI2S_SECONDARY>;
> +		qcom,playback-sd-lines = <0>;
> +	};
> +
> +	hdmi-primary@5 {
> +		reg = <LPASS_DP_RX>;
> +	};
> +
> +	wcd-rx@6 {
> +		reg = <LPASS_CDC_DMA_RX0>;
> +	};
> +
> +	wcd-tx@19 {
> +		reg = <LPASS_CDC_DMA_TX3>;
> +	};
> +
> +	va-tx@25 {
> +		reg = <LPASS_CDC_DMA_VA_TX0>;
> +	};
> +};
> +
>  &lpass_tlmm {
>  	dmic01_active: dmic01-active {
>  		clk {
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index 78ec84c..e808d53 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -19,6 +19,7 @@
>  #include <dt-bindings/reset/qcom,sdm845-aoss.h>
>  #include <dt-bindings/reset/qcom,sdm845-pdc.h>
>  #include <dt-bindings/soc/qcom,rpmh-rsc.h>
> +#include <dt-bindings/sound/qcom,lpass.h>
>  #include <dt-bindings/thermal/thermal.h>
>  
>  / {
> @@ -2101,6 +2102,68 @@
>  			#clock-cells = <1>;
>  		};
>  
> +		lpass_cpu: audio@3987000 {
> +			compatible = "qcom,sc7280-lpass-cpu";
> +
> +			reg = <0 0x03987000 0 0x68000>,
> +			      <0 0x03b00000 0 0x29000>,
> +			      <0 0x03260000 0 0xc000>,
> +			      <0 0x03280000 0 0x29000>,
> +			      <0 0x03340000 0 0x29000>,
> +			      <0 0x0336c000 0 0x3000>;
> +

Drop empty line, 'reg' and 'reg-names' belong together'.

> +			reg-names = "lpass-hdmiif",
> +				    "lpass-lpaif",
> +				    "lpass-rxtx-cdc-dma-lpm",
> +				    "lpass-rxtx-lpaif",
> +				    "lpass-va-lpaif",
> +				    "lpass-va-cdc-dma-lpm";
> +
> +			iommus = <&apps_smmu 0x1820 0>,
> +				 <&apps_smmu 0x1821 0>,
> +				 <&apps_smmu 0x1832 0>;
> +			status = "disabled";

Detter put this at the end as many other nodes do, rather than
'hiding' it inmidst of the hardware description.

> +
> +			power-domains =	<&rpmhpd SC7280_LCX>;
> +			power-domain-names = "lcx";
> +			required-opps = <&rpmhpd_opp_nom>;
> +
> +			clocks = <&lpass_aon LPASS_AON_CC_AUDIO_HM_H_CLK>,
> +				 <&lpass_audiocc LPASS_AUDIO_CC_EXT_MCLK0_CLK>,
> +				 <&lpasscore LPASS_CORE_CC_SYSNOC_MPORT_CORE_CLK>,
> +				 <&lpasscore LPASS_CORE_CC_EXT_IF0_IBIT_CLK>,
> +				 <&lpasscore LPASS_CORE_CC_EXT_IF1_IBIT_CLK>,
> +				 <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM_CLK>,
> +				 <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM0_CLK>,
> +				 <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM1_CLK>,
> +				 <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM2_CLK>,
> +				 <&lpass_aon LPASS_AON_CC_VA_MEM0_CLK>;
> +			clock-names = "aon_cc_audio_hm_h",
> +				      "audio_cc_ext_mclk0",
> +				      "core_cc_sysnoc_mport_core",
> +				      "core_cc_ext_if0_ibit",
> +				      "core_cc_ext_if1_ibit",
> +				      "audio_cc_codec_mem",
> +				      "audio_cc_codec_mem0",
> +				      "audio_cc_codec_mem1",
> +				      "audio_cc_codec_mem2",
> +				      "aon_cc_va_mem0";
> +
> +			#sound-dai-cells = <1>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +
> +			interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
> +

drop empty line, 'interrupts' and 'interrupt-names' belong together.

> +			interrupt-names = "lpass-irq-lpaif",
> +					  "lpass-irq-hdmi",
> +					  "lpass-irq-vaif",
> +					  "lpass-irq-rxtxif";
> +		};
> +
>  		lpass_ag_noc: interconnect@3c40000 {
>  			reg = <0 0x03c40000 0 0xf080>;
>  			compatible = "qcom,sc7280-lpass-ag-noc";