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From:   Alex Deucher <alexdeucher@gmail.com>
Date:   Tue, 5 Apr 2022 09:56:10 -0400
Message-ID: <CADnq5_Mf3hpqnbgywSD68CmUe3dYrwjdZpFaMDrMWazDxBFWcg@mail.gmail.com>
Subject: Re: [PATCH] drm/amdgpu: Junk code
To:     Grigory Vasilyev <h0tc0d3@gmail.com>
Cc:     Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>,
        Melissa Wen <mwen@igalia.com>,
        "Pan, Xinhui" <Xinhui.Pan@amd.com>,
        LKML <linux-kernel@vger.kernel.org>,
        amd-gfx list <amd-gfx@lists.freedesktop.org>,
        David Airlie <airlied@linux.ie>,
        Claudio Suarez <cssk@net-c.es>,
        Maling list - DRI developers 
        <dri-devel@lists.freedesktop.org>,
        Alex Deucher <alexander.deucher@amd.com>,
        =?UTF-8?Q?Christian_K=C3=B6nig?= <christian.koenig@amd.com>
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On Tue, Apr 5, 2022 at 5:07 AM Grigory Vasilyev <h0tc0d3@gmail.com> wrote:
>
> Variable igp_lane_info always is 0. 0 & any value =3D 0 and false.
> In this way, all =D1=81onditional statements will false.
> Therefore, it is not clear what this code does.

It was leftover from when the code was ported from radeon.  The igp
lane info was available from the vbios on older APUs.  It's not
relevant on any asics supported by amdgpu.  I've applied the patch and
clarified the commit message.

Thanks,

Alex

>
> Signed-off-by: Grigory Vasilyev <h0tc0d3@gmail.com>
> ---
>  .../gpu/drm/amd/amdgpu/atombios_encoders.c    | 21 -------------------
>  1 file changed, 21 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/atombios_encoders.c b/drivers/gpu=
/drm/amd/amdgpu/atombios_encoders.c
> index 2b0cc793291c..100bad2f5901 100644
> --- a/drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
> +++ b/drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
> @@ -769,7 +769,6 @@ amdgpu_atombios_encoder_setup_dig_transmitter(struct =
drm_encoder *encoder, int a
>         int dp_clock =3D 0;
>         int dp_lane_count =3D 0;
>         int connector_object_id =3D 0;
> -       int igp_lane_info =3D 0;
>         int dig_encoder =3D dig->dig_encoder;
>         int hpd_id =3D AMDGPU_HPD_NONE;
>
> @@ -852,26 +851,6 @@ amdgpu_atombios_encoder_setup_dig_transmitter(struct=
 drm_encoder *encoder, int a
>                         else
>                                 args.v1.ucConfig |=3D ATOM_TRANSMITTER_CO=
NFIG_DIG1_ENCODER;
>
> -                       if ((adev->flags & AMD_IS_APU) &&
> -                           (amdgpu_encoder->encoder_id =3D=3D ENCODER_OB=
JECT_ID_INTERNAL_UNIPHY)) {
> -                               if (is_dp ||
> -                                   !amdgpu_dig_monitor_is_duallink(encod=
er, amdgpu_encoder->pixel_clock)) {
> -                                       if (igp_lane_info & 0x1)
> -                                               args.v1.ucConfig |=3D ATO=
M_TRANSMITTER_CONFIG_LANE_0_3;
> -                                       else if (igp_lane_info & 0x2)
> -                                               args.v1.ucConfig |=3D ATO=
M_TRANSMITTER_CONFIG_LANE_4_7;
> -                                       else if (igp_lane_info & 0x4)
> -                                               args.v1.ucConfig |=3D ATO=
M_TRANSMITTER_CONFIG_LANE_8_11;
> -                                       else if (igp_lane_info & 0x8)
> -                                               args.v1.ucConfig |=3D ATO=
M_TRANSMITTER_CONFIG_LANE_12_15;
> -                               } else {
> -                                       if (igp_lane_info & 0x3)
> -                                               args.v1.ucConfig |=3D ATO=
M_TRANSMITTER_CONFIG_LANE_0_7;
> -                                       else if (igp_lane_info & 0xc)
> -                                               args.v1.ucConfig |=3D ATO=
M_TRANSMITTER_CONFIG_LANE_8_15;
> -                               }
> -                       }
> -
>                         if (dig->linkb)
>                                 args.v1.ucConfig |=3D ATOM_TRANSMITTER_CO=
NFIG_LINKB;
>                         else
> --
> 2.35.1
>