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From:   Jernej =?utf-8?B?xaBrcmFiZWM=?= <jernej.skrabec@gmail.com>
To:     ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de,
        Benjamin Gaignard <benjamin.gaignard@collabora.com>
Cc:     mchehab@kernel.org, nicolas@ndufresne.ca, hverkuil-cisco@xs4all.nl,
        gregkh@linuxfoundation.org, wens@csie.org, samuel@sholland.org,
        linux-media@vger.kernel.org, linux-kernel@vger.kernel.org,
        linux-rockchip@lists.infradead.org, linux-staging@lists.linux.dev,
        linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev
Subject: Re: [RFC PATCH 0/8] media: hantro: Add 10-bit support
Date:   Tue, 05 Apr 2022 20:40:38 +0200
Message-ID: <4386971.LvFx2qVVIh@jernej-laptop>
In-Reply-To: <b6987a9a-56af-f63f-b60a-37df141d6e89@collabora.com>
References: <20220227144926.3006585-1-jernej.skrabec@gmail.com> <b6987a9a-56af-f63f-b60a-37df141d6e89@collabora.com>
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Hi Benjamin!

Dne torek, 05. april 2022 ob 18:07:41 CEST je Benjamin Gaignard napisal(a):
> Le 27/02/2022 =E0 15:49, Jernej Skrabec a =E9crit :
> > First two patches add 10-bit formats to UAPI, third extends filtering
> > mechanism, fourth fixes incorrect assumption, fifth moves register
> > configuration code to proper place, sixth and seventh enable 10-bit
> > VP9 decoding on Allwinner H6 and last increases core frequency on
> > Allwinner H6.
> >=20
> > I'm sending this as RFC to get some comments:
> > 1. format definitions - are fourcc's ok? are comments/descriptions ok?
> > 2. is extended filtering mechanism ok?
> >=20
> > I would also like if these patches are tested on some more HW.
> > Additionally, can someone test tiled P010?
> >=20
> > Please take a look.
>=20
> Hi Jernej,
>=20
> I have create a branch to test this series with VP9 and HEVC:
> https://gitlab.collabora.com/benjamin.gaignard/for-upstream/-/tree/10bit_=
imx
> 8m Feel free to pick what I may need in it.
>=20
> That doesn't improve fluster scores, I think more dev are still needed in
> GST before getting something fully functional.
> Anyway I able to select P010 pixel format if the input is a 10bit bitstre=
am.

What kind of improvements do you expect? Actually, this series is designed =
to=20
change nothing for platforms, where 10-bit format is not added into the lis=
t=20
of supported formats. I think reasons are quite obvious. First, not every=20
device may support 10-bit output. Second, as you might already figured it o=
ut,=20
registers in this series are set only for legacy cores. I have no idea, wha=
t=20
needs to be done for newer ones, since I don't have them. Anyway, I tested=
=20
this with fluster and only one additional test passes, because it is the on=
ly=20
one for 10-bit YUV420.

Best regards,
Jernej