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Imagine a SOC > > with two IOMMU HW blocks that can both process the CPU IOPTE format, > > but have different configuration. > > Curious. Is it hypothesis or real? If real can you help give a concrete > example? Look at arm_smmu_attach_dev() - the domain has exactly one smmu pointer which contains the base address for the SMMU IP block. If the domain doesn't match the smmu pointer from the struct device it won't allow attaching. I know of ARM SOCs with many copies of the SMMU IP block. So at least with current drivers ARM seems to have this limitation. Jason