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[209.85.160.44]) by smtp.gmail.com with ESMTPSA id hg14-20020a056870790e00b000e1c070a73asm5372557oab.55.2022.04.05.19.05.44 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 05 Apr 2022 19:05:45 -0700 (PDT) Received: by mail-oa1-f44.google.com with SMTP id 586e51a60fabf-d39f741ba0so1399790fac.13 for ; Tue, 05 Apr 2022 19:05:44 -0700 (PDT) X-Received: by 2002:a05:6870:c142:b0:dd:d5a3:767c with SMTP id g2-20020a056870c14200b000ddd5a3767cmr2910063oad.291.1649210744492; Tue, 05 Apr 2022 19:05:44 -0700 (PDT) MIME-Version: 1.0 References: <20220127230727.3369358-1-briannorris@chromium.org> <20220127150615.v2.12.I3a5c7f21ecd8221b42c2dbcd618386bce7b3e9a6@changeid> In-Reply-To: From: Brian Norris Date: Tue, 5 Apr 2022 19:05:33 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 12/15] arm64: dts: rockchip: Enable dmc and dfi nodes on gru To: Peter Geis Cc: MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Rob Herring , Linux Kernel Mailing List , "open list:ARM/Rockchip SoC..." , Lin Huang , arm-mail-list , Derek Basehore , devicetree , linux-pm , Heiko Stuebner , Enric Balletbo i Serra , =?UTF-8?B?R2HDq2wgUE9SVEFZ?= , Daniel Lezcano Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,RDNS_NONE,SPF_HELO_NONE,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hello again Peter, On Fri, Mar 4, 2022 at 6:47 AM Peter Geis wrote: > Transitions anywhere from the default 800mhz cause a lock. > > I'm digging deeper, but I'm hoping you can answer some questions in > the meantime: > 1. Does this require something from firmware that isn't available on > Mainline ATF? (AKA special firmware to the Chromebook line) > 2. If not, do you have any recommendations off the top of your head? I may have a better answer for you now. In the intervening time period, I've discovered a potentially-relevant bug, involving interactions between the kernel power-domain driver and ATF. See this series for my current fixes: https://lore.kernel.org/linux-rockchip/20220406014842.2771799-1-briannorris@chromium.org/ [RFC PATCH 0/2] rockchip / devfreq: Coordinate DRAM controller resources between ATF and kernel If that happens to help you (it may help, for instance, if your system was toggling NPLL off/on like mine was; it also may help if you're hitting a race on PMU_BUS_IDLE_REQ like noticed in patch 1), I'd love your feedback there. It's still possible your problems are completely unrelated though. Regards, Brian