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[2620:137:e000::1:18]) by mx.google.com with ESMTPS id c15-20020a17090a4d0f00b001c9b7f08a94si4972163pjg.139.2022.04.06.09.50.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Apr 2022 09:50:27 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) client-ip=2620:137:e000::1:18; Authentication-Results: mx.google.com; dkim=fail header.i=@microchip.com header.s=mchp header.b=DFbiJEB7; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 298C446B806; Wed, 6 Apr 2022 09:02:59 -0700 (PDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237141AbiDFQEl (ORCPT + 99 others); Wed, 6 Apr 2022 12:04:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51964 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237068AbiDFQEN (ORCPT ); Wed, 6 Apr 2022 12:04:13 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DCDA32C49A6; Wed, 6 Apr 2022 06:36:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1649252172; x=1680788172; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=dY3I42F8Fmle57bb/MnsyT2f27MUv242lzfRVo6wB7E=; b=DFbiJEB7eNaoTE/Lgo+Bgf/RfQsYjJzHTwBizdkH1lxu39d0KvF2r7H2 ck4YMUbulwdKGpUqAN+J0fMLs+kQL1VdvTNj6+jCt1Kvsvrtel2qaMdAa oOGjRd5r9M5TFrXkmZC6Ti2tVfXnFw5zXTAhXGcQECY861VY6M0Xq+HMl smJhR9i6eSvwCJw2zdyJN3mLiGCPkxNCOg9OX/d1b4vmeWs74xq5R7kED k3w78+40A4pUyrrflMa7F4Y8RmmX+9CRtxrLqVUEvbCU1LXRHeynLt9Yx MzFRY7i7Czt3JA9J9Vw6xtVeYCYnfWMNIRn+MT1YN2MN4k2pGaPfIFqRO A==; X-IronPort-AV: E=Sophos;i="5.90,239,1643698800"; d="scan'208";a="151734981" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 06 Apr 2022 06:36:12 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Wed, 6 Apr 2022 06:36:11 -0700 Received: from ROB-ULT-M18064N.mchp-main.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Wed, 6 Apr 2022 06:36:09 -0700 From: Tudor Ambarus To: CC: , , , , , , "Tudor Ambarus" , Subject: [PATCH v2 1/2] spi: atmel-quadspi: Fix the buswidth adjustment between spi-mem and controller Date: Wed, 6 Apr 2022 16:36:03 +0300 Message-ID: <20220406133604.455356-1-tudor.ambarus@microchip.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Spam-Status: No, score=-1.7 required=5.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,RDNS_NONE, SPF_HELO_NONE,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Use the spi_mem_default_supports_op() core helper in order to take into account the buswidth specified by the user in device tree. Cc: Fixes: 0e6aae08e9ae ("spi: Add QuadSPI driver for Atmel SAMA5D2") Signed-off-by: Tudor Ambarus --- v2: amend patch's subject, s/"spi: atmel-quadspi.c:"/"spi: atmel-quadspi:" drivers/spi/atmel-quadspi.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/spi/atmel-quadspi.c b/drivers/spi/atmel-quadspi.c index 92d9610df1fd..938017a60c8e 100644 --- a/drivers/spi/atmel-quadspi.c +++ b/drivers/spi/atmel-quadspi.c @@ -277,6 +277,9 @@ static int atmel_qspi_find_mode(const struct spi_mem_op *op) static bool atmel_qspi_supports_op(struct spi_mem *mem, const struct spi_mem_op *op) { + if (!spi_mem_default_supports_op(mem, op)) + return false; + if (atmel_qspi_find_mode(op) < 0) return false; -- 2.25.1