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[2620:137:e000::1:20]) by mx.google.com with ESMTP id c15-20020a056a00248f00b004fddde5ff5esi16289008pfv.43.2022.04.06.21.15.59; Wed, 06 Apr 2022 21:16:35 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20210112 header.b=UEHOviag; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239195AbiDGB2C (ORCPT + 99 others); Wed, 6 Apr 2022 21:28:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60592 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240436AbiDGBUA (ORCPT ); Wed, 6 Apr 2022 21:20:00 -0400 Received: from mail-pf1-x44a.google.com (mail-pf1-x44a.google.com [IPv6:2607:f8b0:4864:20::44a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3F4F119483C for ; Wed, 6 Apr 2022 18:16:18 -0700 (PDT) Received: by mail-pf1-x44a.google.com with SMTP id o11-20020a62cd0b000000b0050564575a89so582824pfg.14 for ; Wed, 06 Apr 2022 18:16:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=date:in-reply-to:message-id:mime-version:references:subject:from:to :cc; bh=nVjr47POGBC3EXh5NnqgjDaWypqAXR5XHk3JbhNyB5Q=; b=UEHOviag/BPM19H+OoV8/7haDhyLRHPmFT6c36z/LhTHTL9XgN7R6UoUHz00VXYzWK q0WFP3B4ycjNKRSSpdSG6gAkiiN61agfFYlh5CUuCAhWINLpY2ILHm3mI+ybDfQH49yd Pfitp3CWvCIFGSBal/d9c6GKiXGrJGSxKU0fiMSzMlAGZ0POtU5cIZR8mUOacnFGy5dq hIWa/NfNhNYdGSAN77qgHlWn6IKNolWI8LKU/fB+3KvuU9rK5TN2oqjR3R0icroTkrnh sp6xwTtw0jmeGayySb0faJwkub8h1KOvf6mkLlxbp7aUiDHREJO46cEumeJT9wrOO+Z5 x6Tw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=nVjr47POGBC3EXh5NnqgjDaWypqAXR5XHk3JbhNyB5Q=; b=b9Z0QF4+8duuHqE1A/+VvMiUVVHoi4fg93SrB4UJ3iwR/fSLXv83KolEWyJskcVoq/ xboobMoWMgvthi2yNXbC7QrcOfZlRJHjnIv9NIDi9riU4ILcyb7CieMsiK1LMO6IDN7T xmqns+IRadBG1NzA7eeb0UFO8Rm5TTEmlta+6PXAIexIc08gxfg+RNjbEV/62cHeLkZR PH6n6ju6pxABOyE9qukaj3TgRg/F34U271jQoaaIoA8CTuNnRMccaxJ9++q5BIEjldWi eBhpLgs0IcmNCZqqtjHi8+PxZPbiEPbi0qrr+wGkYPgX05Pl3+Zgj0lwXH6FLmf6501g YOSQ== X-Gm-Message-State: AOAM531yg8SwsSIDm/mZHObAWqcg6rTVmhJb7Bp3oI1XPoLpaC//7tsE oWSpLcJiosMNiM4I8penxb4ok/IMeG8h X-Received: from rananta-virt.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:1bcc]) (user=rananta job=sendgmr) by 2002:a17:902:cecb:b0:154:6f46:a5d6 with SMTP id d11-20020a170902cecb00b001546f46a5d6mr11461482plg.92.1649294177690; Wed, 06 Apr 2022 18:16:17 -0700 (PDT) Date: Thu, 7 Apr 2022 01:15:58 +0000 In-Reply-To: <20220407011605.1966778-1-rananta@google.com> Message-Id: <20220407011605.1966778-4-rananta@google.com> Mime-Version: 1.0 References: <20220407011605.1966778-1-rananta@google.com> X-Mailer: git-send-email 2.35.1.1094.g7c7d902a7c-goog Subject: [PATCH v5 03/10] KVM: arm64: Add standard hypervisor firmware register From: Raghavendra Rao Ananta To: Marc Zyngier , Andrew Jones , James Morse , Alexandru Elisei , Suzuki K Poulose Cc: Paolo Bonzini , Catalin Marinas , Will Deacon , Peter Shier , Ricardo Koller , Oliver Upton , Reiji Watanabe , Jing Zhang , Raghavendra Rao Anata , linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org, kvm@vger.kernel.org Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-9.6 required=5.0 tests=BAYES_00,DKIMWL_WL_MED, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,USER_IN_DEF_DKIM_WL autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Introduce the firmware register to hold the standard hypervisor service calls (owner value 5) as a bitmap. The bitmap represents the features that'll be enabled for the guest, as configured by the user-space. Currently, this includes support only for Paravirtualized time, represented by bit-0. Signed-off-by: Raghavendra Rao Ananta --- arch/arm64/include/asm/kvm_host.h | 2 ++ arch/arm64/include/uapi/asm/kvm.h | 3 +++ arch/arm64/kvm/hypercalls.c | 21 ++++++++++++++++++--- include/kvm/arm_hypercalls.h | 4 ++++ 4 files changed, 27 insertions(+), 3 deletions(-) diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h index 6e663383d7b4..20165242ebd9 100644 --- a/arch/arm64/include/asm/kvm_host.h +++ b/arch/arm64/include/asm/kvm_host.h @@ -105,9 +105,11 @@ struct kvm_arch_memory_slot { * struct kvm_smccc_features: Descriptor the hypercall services exposed to the guests * * @std_bmap: Bitmap of standard secure service calls + * @std_hyp_bmap: Bitmap of standard hypervisor service calls */ struct kvm_smccc_features { u64 std_bmap; + u64 std_hyp_bmap; }; struct kvm_arch { diff --git a/arch/arm64/include/uapi/asm/kvm.h b/arch/arm64/include/uapi/asm/kvm.h index 56e4bc58a355..67353bf4e69d 100644 --- a/arch/arm64/include/uapi/asm/kvm.h +++ b/arch/arm64/include/uapi/asm/kvm.h @@ -341,6 +341,9 @@ struct kvm_arm_copy_mte_tags { #define KVM_REG_ARM_STD_BMAP KVM_REG_ARM_FW_FEAT_BMAP_REG(0) #define KVM_REG_ARM_STD_BIT_TRNG_V1_0 BIT(0) +#define KVM_REG_ARM_STD_HYP_BMAP KVM_REG_ARM_FW_FEAT_BMAP_REG(1) +#define KVM_REG_ARM_STD_HYP_BIT_PV_TIME BIT(0) + /* Device Control API: ARM VGIC */ #define KVM_DEV_ARM_VGIC_GRP_ADDR 0 #define KVM_DEV_ARM_VGIC_GRP_DIST_REGS 1 diff --git a/arch/arm64/kvm/hypercalls.c b/arch/arm64/kvm/hypercalls.c index cf04b5ee5f56..64ae6c7e7145 100644 --- a/arch/arm64/kvm/hypercalls.c +++ b/arch/arm64/kvm/hypercalls.c @@ -65,8 +65,6 @@ static void kvm_ptp_get_time(struct kvm_vcpu *vcpu, u64 *val) static const u32 hvc_func_default_allowed_list[] = { ARM_SMCCC_VERSION_FUNC_ID, ARM_SMCCC_ARCH_FEATURES_FUNC_ID, - ARM_SMCCC_HV_PV_TIME_FEATURES, - ARM_SMCCC_HV_PV_TIME_ST, ARM_SMCCC_VENDOR_HYP_CALL_UID_FUNC_ID, ARM_SMCCC_VENDOR_HYP_KVM_FEATURES_FUNC_ID, ARM_SMCCC_VENDOR_HYP_KVM_PTP_FUNC_ID, @@ -100,6 +98,10 @@ static bool kvm_hvc_call_allowed(struct kvm_vcpu *vcpu, u32 func_id) case ARM_SMCCC_TRNG_RND64: return kvm_arm_fw_reg_feat_enabled(smccc_feat->std_bmap, KVM_REG_ARM_STD_BIT_TRNG_V1_0); + case ARM_SMCCC_HV_PV_TIME_FEATURES: + case ARM_SMCCC_HV_PV_TIME_ST: + return kvm_arm_fw_reg_feat_enabled(smccc_feat->std_hyp_bmap, + KVM_REG_ARM_STD_HYP_BIT_PV_TIME); default: return kvm_hvc_call_default_allowed(vcpu, func_id); } @@ -107,6 +109,7 @@ static bool kvm_hvc_call_allowed(struct kvm_vcpu *vcpu, u32 func_id) int kvm_hvc_call_handler(struct kvm_vcpu *vcpu) { + struct kvm_smccc_features *smccc_feat = &vcpu->kvm->arch.smccc_feat; u32 func_id = smccc_get_function(vcpu); u64 val[4] = {SMCCC_RET_NOT_SUPPORTED}; u32 feature; @@ -170,7 +173,9 @@ int kvm_hvc_call_handler(struct kvm_vcpu *vcpu) } break; case ARM_SMCCC_HV_PV_TIME_FEATURES: - val[0] = SMCCC_RET_SUCCESS; + if (kvm_arm_fw_reg_feat_enabled(smccc_feat->std_hyp_bmap, + KVM_REG_ARM_STD_HYP_BIT_PV_TIME)) + val[0] = SMCCC_RET_SUCCESS; break; } break; @@ -216,6 +221,7 @@ static const u64 kvm_arm_fw_reg_ids[] = { KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2, KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3, KVM_REG_ARM_STD_BMAP, + KVM_REG_ARM_STD_HYP_BMAP, }; void kvm_arm_init_hypercalls(struct kvm *kvm) @@ -223,6 +229,7 @@ void kvm_arm_init_hypercalls(struct kvm *kvm) struct kvm_smccc_features *smccc_feat = &kvm->arch.smccc_feat; smccc_feat->std_bmap = KVM_ARM_SMCCC_STD_FEATURES; + smccc_feat->std_hyp_bmap = KVM_ARM_SMCCC_STD_HYP_FEATURES; } int kvm_arm_get_fw_num_regs(struct kvm_vcpu *vcpu) @@ -312,6 +319,9 @@ int kvm_arm_get_fw_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg) case KVM_REG_ARM_STD_BMAP: val = READ_ONCE(smccc_feat->std_bmap); break; + case KVM_REG_ARM_STD_HYP_BMAP: + val = READ_ONCE(smccc_feat->std_hyp_bmap); + break; default: return -ENOENT; } @@ -334,6 +344,10 @@ static int kvm_arm_set_fw_reg_bmap(struct kvm_vcpu *vcpu, u64 reg_id, u64 val) fw_reg_bmap = &smccc_feat->std_bmap; fw_reg_features = KVM_ARM_SMCCC_STD_FEATURES; break; + case KVM_REG_ARM_STD_HYP_BMAP: + fw_reg_bmap = &smccc_feat->std_hyp_bmap; + fw_reg_features = KVM_ARM_SMCCC_STD_HYP_FEATURES; + break; default: return -ENOENT; } @@ -438,6 +452,7 @@ int kvm_arm_set_fw_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg) return 0; case KVM_REG_ARM_STD_BMAP: + case KVM_REG_ARM_STD_HYP_BMAP: return kvm_arm_set_fw_reg_bmap(vcpu, reg->id, val); default: return -ENOENT; diff --git a/include/kvm/arm_hypercalls.h b/include/kvm/arm_hypercalls.h index fd3ff350ee9d..b0915d8c5b81 100644 --- a/include/kvm/arm_hypercalls.h +++ b/include/kvm/arm_hypercalls.h @@ -8,10 +8,14 @@ /* Last valid bits of the bitmapped firmware registers */ #define KVM_REG_ARM_STD_BMAP_BIT_MAX 0 +#define KVM_REG_ARM_STD_HYP_BMAP_BIT_MAX 0 #define KVM_ARM_SMCCC_STD_FEATURES \ GENMASK_ULL(KVM_REG_ARM_STD_BMAP_BIT_MAX, 0) +#define KVM_ARM_SMCCC_STD_HYP_FEATURES \ + GENMASK_ULL(KVM_REG_ARM_STD_HYP_BMAP_BIT_MAX, 0) + int kvm_hvc_call_handler(struct kvm_vcpu *vcpu); static inline u32 smccc_get_function(struct kvm_vcpu *vcpu) -- 2.35.1.1094.g7c7d902a7c-goog