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[2620:137:e000::1:20]) by mx.google.com with ESMTP id 27-20020a630f5b000000b003816043ef5esi19449135pgp.339.2022.04.07.06.18.45; Thu, 07 Apr 2022 06:19:08 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcdkim header.b=nQzA9zCD; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243278AbiDGIrY (ORCPT + 99 others); Thu, 7 Apr 2022 04:47:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44000 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242459AbiDGIrX (ORCPT ); Thu, 7 Apr 2022 04:47:23 -0400 Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0D31F2529D; Thu, 7 Apr 2022 01:45:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1649321124; x=1680857124; h=from:to:cc:subject:date:message-id:mime-version; bh=cD7KFslTNv+boiyUbLJIbxlWWED/xR3IxMt+KGFzNFc=; b=nQzA9zCDcX9NCEJ3XbB86LuCC9wR801i2YFQWzrkIm1lafbeNNNFE//r /r8ZGGU7Hv+I8iGaPgUh/ttVsRbbGl8XgXwqoW1qtLrP1VQ88/hxrX7Y5 xsTScbWQm2VsG8C6URPk7GA54nRTycEbLBQzb16MBGFEJYrS22rzceNTV A=; Received: from ironmsg09-lv.qualcomm.com ([10.47.202.153]) by alexa-out.qualcomm.com with ESMTP; 07 Apr 2022 01:45:23 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg09-lv.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Apr 2022 01:45:22 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Thu, 7 Apr 2022 01:45:22 -0700 Received: from c-sanm-linux.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Thu, 7 Apr 2022 01:45:16 -0700 From: Sandeep Maheswaram To: Rob Herring , Andy Gross , "Bjorn Andersson" , Greg Kroah-Hartman , Felipe Balbi , Stephen Boyd , Doug Anderson , "Matthias Kaehlcke" , Mathias Nyman , Krzysztof Kozlowski CC: , , , , , , , , Sandeep Maheswaram Subject: [PATCH v12 0/6] USB DWC3 host wake up support from system suspend Date: Thu, 7 Apr 2022 14:14:58 +0530 Message-ID: <1649321104-31322-1-git-send-email-quic_c_sanm@quicinc.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Avoiding phy powerdown in host mode when wakeup capable devices are connected, so that it can be wake up by devices. Set GENPD_FLAG_ALWAYS_ON flag to keep usb30_prim gdsc active to retain controller status during suspend/resume. Changes in v12: Squashed PATCH 1/5 and 2/5 of v11. Added dt bindings and device tree entry for wakeup-source property for dwc3 core node. Dropped redundant phy_set_mode call. Changes in v11: Moving back to v8 version https://patchwork.kernel.org/project/linux-arm-msm/cover/1624882097-23265-1-git-send-email-sanm@codeaurora.org as we are getting interrupts during suspend when enabling both DP hs phy irq and DM hs phy irq. Moved the set phy mode function to dwc3/core.c from xhci-plat.c We didn't find any other option other than accessing xhci from dwc. Changes in v10: PATCH 1/6: Change device_set_wakeup_capable to device_set_wakeup_enable PATCH 2/6: Remove redundant else part in dwc3_resume_common PATCH 4/6: Change the irg flags PATCH 5/6: Set flag GENPD_FLAG_ALWAYS_ON PATCH 6/6: Remove disable interrupts function and enable interrupts in probe. Changes in v9: Checking with device_may_makeup property instead of phy_power_off flag. Changed the IRQ flags and removed hs_phy_mode variable. Changes in v8: Moved the dwc3 suspend quirk code in dwc3/host.c to xhci-plat.c Checking phy_power_off flag instead of usb_wakeup_enabled_descendants to keep gdsc active. Changes in v7: Change in commit text and message in PATCH 1/5 and PATCH 5/5 as per Matthias suggestion. Added curly braces for if and else if sections in PATCH 4/5. Changes in v6: Addressed comments in host.c and core.c Separated the patches in dwc3-qcom.c to make it simple. Dropped wakeup-source change as it is not related to this series. Changes in v5: Added phy_power_off flag to check presence of wakeup capable devices. Dropped patch[v4,4/5] as it is present linux-next. Addressed comments in host.c and dwc3-qcom.c. Changes in v4: Addressed Matthias comments raised in v3. Changes in v3: Removed need_phy_for_wakeup flag and by default avoiding phy powerdown. Addressed Matthias comments and added entry for DEV_SUPERSPEED. Added suspend_quirk in dwc3 host and moved the dwc3_set_phy_speed_flags. Added wakeup-source dt entry and reading in dwc-qcom.c glue driver. Changes in v2: Dropped the patch in clock to set GENPD_FLAG_ACTIVE_WAKEUP flag and setting in usb dwc3 driver. Separated the core patch and glue driver patch. Made need_phy_for_wakeup flag part of dwc structure and hs_phy_flags as unsgined int. Adrressed the comment on device_init_wakeup call. Corrected offset for reading portsc register. Added pacth to support wakeup in xo shutdown case. Sandeep Maheswaram (6): usb: dwc3: core: Host wake up support from system suspend usb: dwc3: qcom: Add helper functions to enable,disable wake irqs usb: dwc3: qcom: Configure wakeup interrupts during suspend usb: dwc3: qcom: Keep power domain on to retain controller status dt-bindings: usb: dwc3: Add wakeup-source property support arm64: dts: qcom: sc7280: Add wakeup-source property for USB node .../devicetree/bindings/usb/snps,dwc3.yaml | 5 ++ arch/arm64/boot/dts/qcom/sc7280.dtsi | 1 + drivers/usb/dwc3/core.c | 29 ++++++--- drivers/usb/dwc3/core.h | 4 ++ drivers/usb/dwc3/dwc3-qcom.c | 74 +++++++++++++--------- drivers/usb/dwc3/host.c | 25 ++++++++ 6 files changed, 99 insertions(+), 39 deletions(-) -- 2.7.4