Received: by 2002:a05:6a10:2726:0:0:0:0 with SMTP id ib38csp385645pxb; Thu, 7 Apr 2022 08:08:48 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwlJIT61daET8OOfjmrBT9YdD6PNm2z8Y1abP0blhT5IR3V8JxWYB3ATJzqMK1lqCk4+8yy X-Received: by 2002:a17:90a:6389:b0:1c9:ee11:6c2c with SMTP id f9-20020a17090a638900b001c9ee116c2cmr16590943pjj.107.1649344128042; Thu, 07 Apr 2022 08:08:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1649344128; cv=none; d=google.com; s=arc-20160816; b=kQ3FOFnVoI8/wBJu/xNX/1xpkDmfmXJnBNyoCO0m3t9+mGW1PuAy07Z+zzzYZBaNy2 7WlCIIc00+sygwAwBiLvnTvAJa8cotSqbRVZmG+zuaG2YuM7gIxfUVFMAMa/swcpbxXC soP/MdK/MnhAJAujf8dx6cjd041LUlXDS91seiBss3QWsiwzyblcqfQP48mKIxdB6yw/ NT4M7TywbxC/OJ+8WKBm2isHPeGeFoJsX5ejguDke6kf7r02r0Dhno2D0Y8/xAhA5LY8 nhLGRMYc4xPNke8IyoMaT9NzXd2yw7JX9QQLL6F1dGo6qhU5Om9JsVC4Elyhe53YY1a4 9jjQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=2nj/2WwMmCVUwPpifxhhiv3m7tueZFwVVuAhH8dj440=; b=gPbL6koXnuJySZ667YHlll92lMStioPq8Dr6yLR3spLvuTsr7LdWhGOMer159oRExi R8XvLeNKECDqqGEw/cJt1RJzECbs+1SQnkwpqvi7KRDDLtOHQ2f8tgGt89HqSqmEP+JG ejqtT6cEpH320uQnD/QC6/1TxaR3X5uKfGeIxQiLMcLGxotN+aLn/fU7330WFxqDFG05 V8lAE2ztkfE/KFXLySGyQ1Il3feWa7qi9RSzra9sKXFqHa3N1VW0xOjI6dLb67AQ9ltw e1aUXugdzc5mDABGZIS1Qn5bLjUVznMiipcCocLFObhW3ieIz1hLqli3pCaeR1J+zfGs olpw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=mgZb7GKa; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id p23-20020a63fe17000000b003816043eeafsi18959921pgh.164.2022.04.07.08.07.57; Thu, 07 Apr 2022 08:08:48 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=mgZb7GKa; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S245668AbiDGNCS (ORCPT + 99 others); Thu, 7 Apr 2022 09:02:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60742 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S245664AbiDGNCC (ORCPT ); Thu, 7 Apr 2022 09:02:02 -0400 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 801A11A4D4C for ; Thu, 7 Apr 2022 06:00:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1649336400; x=1680872400; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=uTo4JKBz3R9DB0Jqa/bBGyfl+v7N2xIKemzf6pgX930=; b=mgZb7GKayQk/ddElYJ8n8j6CNXrHpOiukAWZCOFZQfyZMl9+VELq3wiQ c7UV4ii5Tns6hgHNvtwt0mAbSDAzS0PZubWzmP+hDgQN2oHej6+9m5SEI 7ccOWoRfcgcsPrlECKk6UL7Gly/qgNLDtCW8lrvexTEp20V8EO1yOqEY4 lXboQkD+nK/4Qn88UedoPj/BbS9nt1pQQpxPk8jPAnKYtGXaqYxvhNcEo hfvzRSGoSJ9mRi4IPCQYm5eM56wQ0v7CBHIxeWLFokOcx9ew54Q07z2kn NCYmz0862287oG6v54gH5cWM90K0h/cxFhhSMvhKNJU9a07c1mrSicuTm A==; X-IronPort-AV: E=McAfee;i="6400,9594,10309"; a="241907508" X-IronPort-AV: E=Sophos;i="5.90,242,1643702400"; d="scan'208";a="241907508" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Apr 2022 06:00:00 -0700 X-IronPort-AV: E=Sophos;i="5.90,242,1643702400"; d="scan'208";a="571040921" Received: from sannilnx.jer.intel.com ([10.12.231.73]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Apr 2022 05:59:56 -0700 From: Alexander Usyskin To: Greg Kroah-Hartman , Jani Nikula , Joonas Lahtinen , Rodrigo Vivi , David Airlie , Daniel Vetter , Tvrtko Ursulin Cc: Tomas Winkler , Alexander Usyskin , Vitaly Lubart , intel-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [PATCH 10/20] drm/i915/gsc: add GSC XeHP SDV platform definition Date: Thu, 7 Apr 2022 15:58:29 +0300 Message-Id: <20220407125839.1479249-11-alexander.usyskin@intel.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220407125839.1479249-1-alexander.usyskin@intel.com> References: <20220407125839.1479249-1-alexander.usyskin@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Define GSC on XeHP SDV (Intel(R) dGPU without display) XeHP SDV uses the same hardware settings as DG1, but uses polling instead of interrupts and runs the firmware in slow pace due to hardware limitations. Signed-off-by: Vitaly Lubart Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/i915/gt/intel_gsc.c | 22 +++++++++++++++++++++- 1 file changed, 21 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gt/intel_gsc.c b/drivers/gpu/drm/i915/gt/intel_gsc.c index 175571c6f71d..ffe6716590f0 100644 --- a/drivers/gpu/drm/i915/gt/intel_gsc.c +++ b/drivers/gpu/drm/i915/gt/intel_gsc.c @@ -56,6 +56,19 @@ static const struct gsc_def gsc_def_dg1[] = { } }; +static const struct gsc_def gsc_def_xehpsdv[] = { + { + /* HECI1 not enabled on the device. */ + }, + { + .name = "mei-gscfi", + .bar = DG1_GSC_HECI2_BASE, + .bar_size = GSC_BAR_LENGTH, + .use_polling = true, + .slow_fw = true, + } +}; + static void gsc_release_dev(struct device *dev) { struct auxiliary_device *aux_dev = to_auxiliary_dev(dev); @@ -92,7 +105,14 @@ static void gsc_init_one(struct drm_i915_private *i915, if (intf_id == 0 && !HAS_HECI_PXP(i915)) return; - def = &gsc_def_dg1[intf_id]; + if (IS_DG1(i915)) { + def = &gsc_def_dg1[intf_id]; + } else if (IS_XEHPSDV(i915)) { + def = &gsc_def_xehpsdv[intf_id]; + } else { + drm_warn_once(&i915->drm, "Unknown platform\n"); + return; + } if (!def->name) { drm_warn_once(&i915->drm, "HECI%d is not implemented!\n", intf_id + 1); -- 2.32.0