Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) client-ip=2620:137:e000::1:18;
Message-ID: <bfb8a830-4cd9-361b-e4db-a6d07dc1cbe0@kernel.org>
Date:   Thu, 7 Apr 2022 14:08:18 -0500
MIME-Version: 1.0
User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101
 Thunderbird/91.5.0
Subject: Re: [PATCH] ARM: dts: socfpga: align SPI NOR node name with dtschema
Content-Language: en-US
To:     Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
References: <20220407143049.294794-1-krzysztof.kozlowski@linaro.org>
From:   Dinh Nguyen <dinguyen@kernel.org>
In-Reply-To: <20220407143049.294794-1-krzysztof.kozlowski@linaro.org>
Content-Type: text/plain; charset=UTF-8; format=flowed
Content-Transfer-Encoding: 7bit
Precedence: bulk


On 4/7/22 09:30, Krzysztof Kozlowski wrote:
> The node names should be generic and SPI NOR dtschema expects "flash".
> 
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> ---
>   arch/arm/boot/dts/socfpga_arria10_socdk_qspi.dts   | 2 +-
>   arch/arm/boot/dts/socfpga_cyclone5_socdk.dts       | 2 +-
>   arch/arm/boot/dts/socfpga_cyclone5_sodia.dts       | 2 +-
>   arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts | 4 ++--
>   4 files changed, 5 insertions(+), 5 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/socfpga_arria10_socdk_qspi.dts b/arch/arm/boot/dts/socfpga_arria10_socdk_qspi.dts
> index 2a745522404d..11ccdc6c2dc6 100644
> --- a/arch/arm/boot/dts/socfpga_arria10_socdk_qspi.dts
> +++ b/arch/arm/boot/dts/socfpga_arria10_socdk_qspi.dts
> @@ -9,7 +9,7 @@
>   &qspi {
>   	status = "okay";
>   
> -	flash0: n25q00@0 {
> +	flash0: flash@0 {
>   		#address-cells = <1>;
>   		#size-cells = <1>;
>   		compatible = "micron,mt25qu02g", "jedec,spi-nor";
> diff --git a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts b/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
> index 253ef139181d..b2241205c7a9 100644
> --- a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
> +++ b/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
> @@ -121,7 +121,7 @@ &mmc0 {
>   &qspi {
>   	status = "okay";
>   
> -	flash0: n25q00@0 {
> +	flash0: flash@0 {
>   		#address-cells = <1>;
>   		#size-cells = <1>;
>   		compatible = "micron,mt25qu02g", "jedec,spi-nor";
> diff --git a/arch/arm/boot/dts/socfpga_cyclone5_sodia.dts b/arch/arm/boot/dts/socfpga_cyclone5_sodia.dts
> index b0003f350e65..2564671fc1c6 100644
> --- a/arch/arm/boot/dts/socfpga_cyclone5_sodia.dts
> +++ b/arch/arm/boot/dts/socfpga_cyclone5_sodia.dts
> @@ -113,7 +113,7 @@ &usb1 {
>   &qspi {
>   	status = "okay";
>   
> -	flash0: n25q512a@0 {
> +	flash0: flash@0 {
>   		#address-cells = <1>;
>   		#size-cells = <1>;
>   		compatible = "micron,n25q512a", "jedec,spi-nor";
> diff --git a/arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts b/arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts
> index 25874e1b9c82..f24f17c2f5ee 100644
> --- a/arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts
> +++ b/arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts
> @@ -221,7 +221,7 @@ at24@50 {
>   &qspi {
>   	status = "okay";
>   
> -	n25q128@0 {
> +	flash@0 {
>   		#address-cells = <1>;
>   		#size-cells = <1>;
>   		compatible = "micron,n25q128", "jedec,spi-nor";
> @@ -238,7 +238,7 @@ n25q128@0 {
>   		cdns,tslch-ns = <4>;
>   	};
>   
> -	n25q00@1 {
> +	flash@1 {
>   		#address-cells = <1>;
>   		#size-cells = <1>;
>   		compatible = "micron,mt25qu02g", "jedec,spi-nor";


Applied!

Thanks,
Dinh