Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
From:   Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To:     Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>,
        bhelgaas@google.com
Cc:     Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
        linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
        bjorn.andersson@linaro.org, robh@kernel.org,
        linux-pci@vger.kernel.org, svarbanov@mm-sol.com
Subject: Re: [PATCH] PCI: qcom: Add support for handling MSIs from 8 endpoints
Date:   Fri,  8 Apr 2022 11:03:39 +0100
Message-Id: <164941220567.21822.2763856506631523192.b4-ty@arm.com>
In-Reply-To: <20211214101319.25258-1-manivannan.sadhasivam@linaro.org>
References: <20211214101319.25258-1-manivannan.sadhasivam@linaro.org>
MIME-Version: 1.0
Content-Type: text/plain; charset="utf-8"
Content-Transfer-Encoding: 8bit
Precedence: bulk

On Tue, 14 Dec 2021 15:43:19 +0530, Manivannan Sadhasivam wrote:
> The DWC controller used in the Qcom Platforms are capable of addressing the
> MSIs generated from 8 different endpoints each with 32 vectors (256 in
> total). Currently the driver is using the default value of addressing the
> MSIs from 1 endpoint only. Extend it by passing the MAX_MSI_IRQS to the
> num_vectors field of pcie_port structure.
> 
> 
> [...]

Applied to pci/qcom, thanks!

[1/1] PCI: qcom: Add support for handling MSIs from 8 endpoints
      https://git.kernel.org/lpieralisi/pci/c/20f1bfb8dd

Thanks,
Lorenzo