Received: by 2002:a05:6a10:144:0:0:0:0 with SMTP id 4csp636747pxw; Fri, 8 Apr 2022 17:36:13 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxYUNjMAB49pJzfdMUGjn9J2NVzPQAX+yXyIISbQwnnt1z50hbL4pxSLgrHbzqNih+HW1pu X-Received: by 2002:a17:907:3f9a:b0:6e0:e2f5:aded with SMTP id hr26-20020a1709073f9a00b006e0e2f5adedmr20343946ejc.743.1649464573388; Fri, 08 Apr 2022 17:36:13 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1649464573; cv=none; d=google.com; s=arc-20160816; b=TyT2hJ9IFHFSdjplz7ZlgpwqpwitlaHyNt2azq7bGLm7W5vhqnKn6Y7JwOdFGD6V6Y zEHVHlMoWYL8k9vfQrd3WCF8k3mP5GhbEi4DRT6MLNq8E1/bH1f6B4te31ENll+7yfCF r3O4pZAc666PS/pGQDMs2zjP0wNmPWmM4afvCG6aBDAY38X1RE7o3wegLQyfNHZKc3OD Ee+llXzecw6Gm7CzOWDT5LgZEPmaQbLj0/G8+7ZTQLpq1W+4qYGdcfdTV4mGz+DHaftw cRhWLLyUG2+gdtv9P3vTR4DWtikdY0PRY+/u9ZYdSVChonYZvYWq7rT2aan/6e1u9M28 dK4w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:dkim-signature; bh=aV4gP9imWb5RV0sDAD5Q2cONnZ9+iBwKt8kNT5bBOgs=; b=eYOPYKvZZF+eDEGfA8pkPJf12AiyxCioF2qlNLiXTPcEffJNsxukI+Yx9c6OXWFYhn nMQZjeGWn2Nwe7uLY46++bjFCCK+awJvcWOjRoAgPB5Dq593SAs9ZILivmRSIx61gn4X XuIvOH4N3Sw5ypWR9+Uqw4Hldj22c/D7ugGsGiT8OfdUYAbYtyPCP5wRHwGSh9sd07SH bDiQ9LWAh2Qx0X8gtjejfZ1ONwgakyK/LXhVlhUPmIjRVYca4N3Zhj0N5ScvPtP6HMgE nytwgooOGO83P3UN+mUc5rAabUosUtVmC10np4w8l7qRoX8MfglFpo/zdgF7QuN1zTVs gR9A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=EPNSfj2n; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id o12-20020a509b0c000000b00418f53ed459si1781069edi.192.2022.04.08.17.35.39; Fri, 08 Apr 2022 17:36:13 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=EPNSfj2n; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239689AbiDHVII (ORCPT + 99 others); Fri, 8 Apr 2022 17:08:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37558 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239676AbiDHVH6 (ORCPT ); Fri, 8 Apr 2022 17:07:58 -0400 Received: from mail-ot1-x32e.google.com (mail-ot1-x32e.google.com [IPv6:2607:f8b0:4864:20::32e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 176B313CCF4 for ; Fri, 8 Apr 2022 14:05:54 -0700 (PDT) Received: by mail-ot1-x32e.google.com with SMTP id e25-20020a0568301e5900b005b236d5d74fso6968627otj.0 for ; Fri, 08 Apr 2022 14:05:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=aV4gP9imWb5RV0sDAD5Q2cONnZ9+iBwKt8kNT5bBOgs=; b=EPNSfj2nSYc7mOIqFUv4NpJ2ph3jKTAr6r155GsfmKoMjl+mstddRpU/PdkCD+veSr RRmRFlM2YM1vcHvSJOD16KHHggz7wTKD4KnPt2wSVe8I+KLt7zb2acZz8sBiiVifWvMI 89QabWBFFUOuxcNwBpwpcOj/q4R2tLjw14g37tshRqdCwtxB/jvy3JDhfQRlsjwaauYJ MeuOb0c1u1AeWs9lU8KrdCEdbsORexjiWQFpe3SkflxGFQn9vCsryZO1CPhC/nA/L64U nk/F3WpK5aV6MdVZ9roK+zUfKDksBpag9Xp5jN+0GPLtufE3lREvNi2WfaVfsjG+Fa9d xC0w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=aV4gP9imWb5RV0sDAD5Q2cONnZ9+iBwKt8kNT5bBOgs=; b=YVQyaMNjgtGQlkOJWGKIqA6rzfEKiD9kM+HvK2AeSRNInE3kW22dzNztl8eox6yVVs dy+C1g4gHn3cRXB/UpcexEchLveMiJ6K9Y5x1gP3d2kmZd4Q8SJR9sZtPac97wHIpOoX gIiUXbAN5W+KmGhpkYroGqmqCsySLrJ4WDt5MWp8BF8eVsAdieFGtPScBundCeR5x3RD s3V+4qsjtKHcXY9KyDIfDEnsTjGAJ04lB6K17HBwnCye0e3ZPzRtGzHZzaVDUtDXwbQg nkOG94Wnm6Lca/liAEt17MSW/DxQBZqHJHfWFWkC7uyZrzFiJu1xg2ryDBdiadabLDkt anwg== X-Gm-Message-State: AOAM531gwtZs1RJ3yczvgVtVBfOa+pCxm/MekhhSTJY3+9Dx5errkABR X4GRRJiqqbspLiJfW17F5iElZQ== X-Received: by 2002:a9d:6447:0:b0:5b2:35ae:7ad6 with SMTP id m7-20020a9d6447000000b005b235ae7ad6mr7240550otl.275.1649451953460; Fri, 08 Apr 2022 14:05:53 -0700 (PDT) Received: from ripper.. ([2600:1700:a0:3dc8:205:1bff:fec0:b9b3]) by smtp.gmail.com with ESMTPSA id y18-20020a056871011200b000e1f5910d45sm6560356oab.7.2022.04.08.14.05.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Apr 2022 14:05:52 -0700 (PDT) From: Bjorn Andersson To: Rob Clark , Abhinav Kumar , Rob Herring , Krzysztof Kozlowski , Dmitry Baryshkov Cc: Sean Paul , David Airlie , Daniel Vetter , Philipp Zabel , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 1/2] dt-bindings: display: msm: Add optional resets Date: Fri, 8 Apr 2022 14:08:12 -0700 Message-Id: <20220408210813.581391-1-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.35.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add an optional reference to the MDSS_CORE reset, which when specified can be used by the implementation to reset the hardware blocks. Signed-off-by: Bjorn Andersson --- Resending these two patches again as I put "v2" in the subject, even though I meant v3. Sorry about that. Changes since v2: - None .../devicetree/bindings/display/msm/dpu-qcm2290.yaml | 4 ++++ Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml | 4 ++++ Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml | 4 ++++ Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml | 4 ++++ 4 files changed, 16 insertions(+) diff --git a/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml b/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml index 6fb7e321f011..734d14de966d 100644 --- a/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml +++ b/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml @@ -66,6 +66,10 @@ properties: interconnect-names: const: mdp0-mem + resets: + items: + - description: MDSS_CORE reset + patternProperties: "^display-controller@[0-9a-f]+$": type: object diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml index 12a86b1ec1bc..b41991eaa454 100644 --- a/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml +++ b/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml @@ -65,6 +65,10 @@ properties: interconnect-names: const: mdp0-mem + resets: + items: + - description: MDSS_CORE reset + patternProperties: "^display-controller@[0-9a-f]+$": type: object diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml index fbeb931a026e..6e417d06fc79 100644 --- a/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml +++ b/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml @@ -64,6 +64,10 @@ properties: interconnect-names: const: mdp0-mem + resets: + items: + - description: MDSS_CORE reset + patternProperties: "^display-controller@[0-9a-f]+$": type: object diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml index 0dca4b3d66e4..1a42491efdbc 100644 --- a/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml +++ b/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml @@ -57,6 +57,10 @@ properties: ranges: true + resets: + items: + - description: MDSS_CORE reset + patternProperties: "^display-controller@[0-9a-f]+$": type: object -- 2.35.1