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Date:   Fri, 8 Apr 2022 10:52:36 +0100
From:   Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To:     Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc:     bjorn.andersson@linaro.org, bhelgaas@google.com,
        svarbanov@mm-sol.com, robh@kernel.org, linux-pci@vger.kernel.org,
        linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] PCI: qcom: Add support for handling MSIs from 8 endpoints
Message-ID: <20220408095204.GA14699@lpieralisi>
References: <20211214101319.25258-1-manivannan.sadhasivam@linaro.org>
 <20220223100145.GA26873@lpieralisi>
 <20220328142012.GB17663@thinkpad>
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On Mon, Mar 28, 2022 at 07:50:12PM +0530, Manivannan Sadhasivam wrote:
> On Wed, Feb 23, 2022 at 10:01:45AM +0000, Lorenzo Pieralisi wrote:
> > On Tue, Dec 14, 2021 at 03:43:19PM +0530, Manivannan Sadhasivam wrote:
> > > The DWC controller used in the Qcom Platforms are capable of addressing the
> > > MSIs generated from 8 different endpoints each with 32 vectors (256 in
> > > total). Currently the driver is using the default value of addressing the
> > > MSIs from 1 endpoint only. Extend it by passing the MAX_MSI_IRQS to the
> > > num_vectors field of pcie_port structure.
> > > 
> > > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> > > ---
> > >  drivers/pci/controller/dwc/pcie-qcom.c | 1 +
> > >  1 file changed, 1 insertion(+)
> > 
> > Need an ACK from qcom maintainers.
> > 
> 
> Looks like this patch was not applied eventhough the Acks were received.
> Please let me know if I need to resubmit it for next cycle.

There is no Acked-by tag on the latest version you posted:

https://lore.kernel.org/linux-pci/20220210144745.135721-1-manivannan.sadhasivam@linaro.org

it looks like the tags were given after v2 was posted, hence the
confusion.

I will apply the tags myself this time but what matters for me
is always the latest version posted, I archive the previous ones.

Lorenzo