Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
Message-ID: <bf23e357-1e74-6bbe-7f37-11147654e5fc@gmail.com>
Date:   Sun, 10 Apr 2022 18:04:34 +0300
MIME-Version: 1.0
User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101
 Thunderbird/91.5.0
Subject: Re: [Patch v6 1/4] memory: tegra: Add memory controller channels
 support
Content-Language: en-US
To:     Ashish Mhetre <amhetre@nvidia.com>, krzysztof.kozlowski@linaro.org,
        thierry.reding@gmail.com, jonathanh@nvidia.com, robh+dt@kernel.org,
        linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
        linux-tegra@vger.kernel.org, krzysztof.kozlowski+dt@linaro.org
Cc:     vdumpa@nvidia.com, Snikam@nvidia.com
References: <20220406052459.10438-1-amhetre@nvidia.com>
 <20220406052459.10438-2-amhetre@nvidia.com>
From:   Dmitry Osipenko <digetx@gmail.com>
In-Reply-To: <20220406052459.10438-2-amhetre@nvidia.com>
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Precedence: bulk

06.04.2022 08:24, Ashish Mhetre пишет:
> diff --git a/include/soc/tegra/mc.h b/include/soc/tegra/mc.h
> index 1066b1194a5a..c3c121fbfbb7 100644
> --- a/include/soc/tegra/mc.h
> +++ b/include/soc/tegra/mc.h
> @@ -13,6 +13,9 @@
>  #include <linux/irq.h>
>  #include <linux/reset-controller.h>
>  #include <linux/types.h>
> +#include <linux/platform_device.h>
> +
> +#define MC_MAX_CHANNELS 16
>  
>  struct clk;
>  struct device;
> @@ -181,6 +184,7 @@ struct tegra_mc_ops {
>  	int (*resume)(struct tegra_mc *mc);
>  	irqreturn_t (*handle_irq)(int irq, void *data);
>  	int (*probe_device)(struct tegra_mc *mc, struct device *dev);
> +	int (*map_regs)(struct tegra_mc *mc, struct platform_device *pdev);
>  };
>  
>  struct tegra_mc_soc {
> @@ -194,6 +198,7 @@ struct tegra_mc_soc {
>  	unsigned int atom_size;
>  
>  	u8 client_id_mask;
> +	u8 num_channels;
>  
>  	const struct tegra_smmu_soc *smmu;
>  
> @@ -212,6 +217,8 @@ struct tegra_mc {
>  	struct tegra_smmu *smmu;
>  	struct gart_device *gart;
>  	void __iomem *regs;
> +	void __iomem *bcast_ch_regs;
> +	void __iomem *ch_regs[MC_MAX_CHANNELS];

Why not to allocate ch_regs at runtime?