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Message-ID: <1fac370b-a837-c071-0007-33ae8053b871@nvidia.com>
Date:   Mon, 11 Apr 2022 11:39:50 +0530
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Subject: Re: [Patch v6 3/4] dt-bindings: memory: Update reg maxitems for
 tegra186
Content-Language: en-US
To:     Dmitry Osipenko <digetx@gmail.com>, krzysztof.kozlowski@linaro.org,
        thierry.reding@gmail.com, jonathanh@nvidia.com, robh+dt@kernel.org,
        linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
        linux-tegra@vger.kernel.org, krzysztof.kozlowski+dt@linaro.org
Cc:     vdumpa@nvidia.com, Snikam@nvidia.com
References: <20220406052459.10438-1-amhetre@nvidia.com>
 <20220406052459.10438-4-amhetre@nvidia.com>
 <3e044f9e-3200-bb26-897d-1977e3825c92@gmail.com>
From:   Ashish Mhetre <amhetre@nvidia.com>
In-Reply-To: <3e044f9e-3200-bb26-897d-1977e3825c92@gmail.com>
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On 4/10/2022 7:51 PM, Dmitry Osipenko wrote:
> External email: Use caution opening links or attachments
> 
> 
> 06.04.2022 08:24, Ashish Mhetre пишет:
>>           memory-controller@2c00000 {
>>               compatible = "nvidia,tegra186-mc";
>> -            reg = <0x0 0x02c00000 0x0 0xb0000>;
>> +            reg = <0x0 0x02c00000 0x0 0x10000>,    /* MC-SID */
>> +                  <0x0 0x02c10000 0x0 0x10000>,    /* Broadcast channel */
>> +                  <0x0 0x02c20000 0x0 0x10000>,    /* MC0 */
>> +                  <0x0 0x02c30000 0x0 0x10000>,    /* MC1 */
>> +                  <0x0 0x02c40000 0x0 0x10000>,    /* MC2 */
>> +                  <0x0 0x02c50000 0x0 0x10000>;    /* MC3 */
>> +            reg-names = "mc-sid", "mc-broadcast", "mc0", "mc1", "mc2", "mc3";
> 
> The "mc-" prefix feels redundant to me, I'd name the regs like this:
> 
>    "sid", "broadcast", "ch0", "ch1", "ch2", "ch3"
> 
Okay, I'll update the reg-names by omitting "mc-".
> 
> You should also add validation of the regs/reg-names to the yaml based
> on SoC version. I.e. it's not enough to only bump the maxItems.

Okay, I'll add validation of reg-names as well.