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[2620:137:e000::1:18]) by mx.google.com with ESMTPS id j9-20020a056a00174900b00505b033e35fsi8665848pfc.71.2022.04.12.13.46.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 Apr 2022 13:46:43 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) client-ip=2620:137:e000::1:18; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcdkim header.b="M/8lHt/y"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 6EAE651E5E; Tue, 12 Apr 2022 13:15:47 -0700 (PDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346758AbiDKNzk (ORCPT + 99 others); Mon, 11 Apr 2022 09:55:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45714 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346739AbiDKNzi (ORCPT ); Mon, 11 Apr 2022 09:55:38 -0400 Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 12A36237EC; Mon, 11 Apr 2022 06:53:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1649685205; x=1681221205; h=from:to:cc:subject:date:message-id:mime-version; bh=T/NiD5gJl+Yxtf4t/NxX7c9N/6g4EavjYvbEfvZqqXg=; b=M/8lHt/ymCzXFy8VIsM0bxrX27F5TfbqejrmQkrRxPGr3HGzpxpr2cHA Na13ZaE7xe9gdpd3SXfb7hDbzOyHGBnsPPntDvzTbaPC4NPtHW+gmBDuL JoAUyJIjFmpCNQNv+o4WbCNb+mTMssF52vXMhTPFT3tBsLh1nHxphkrs/ 0=; Received: from ironmsg08-lv.qualcomm.com ([10.47.202.152]) by alexa-out.qualcomm.com with ESMTP; 11 Apr 2022 06:53:25 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg08-lv.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Apr 2022 06:53:24 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Mon, 11 Apr 2022 06:53:23 -0700 Received: from hu-srivasam-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Mon, 11 Apr 2022 06:53:19 -0700 From: Srinivasa Rao Mandadapu To: , , , , , , , , , , CC: Srinivasa Rao Mandadapu Subject: [PATCH v7 0/2] Add lpass pin control support for audio on sc7280 based targets Date: Mon, 11 Apr 2022 19:23:02 +0530 Message-ID: <1649685184-8448-1-git-send-email-quic_srivasam@quicinc.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,RDNS_NONE,SPF_HELO_NONE,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch set is to add lpass pin control support for Audio over I2S, wcd codec and digital mics. This patch set depends on: -- Lpass-lpi pinctrl patches [https://patchwork.kernel.org/project/alsa-devel/list/?series=623951&archive=both&state=*] Changes Since V6: -- Move amp_en node to corresponding consumer patch. -- Update label and node names. -- Remove redundant drive-strengths. -- Remove herobrine crd specific mi2s configuration. Changes Since V5: -- Remove redundant function property in amp_en node. -- Move board specific properties of lpass pin control node to board specific file. -- Remove redundant properties in pin control nodes. -- Move wcd938x codec reset and CTIA/OMTP pin control patches to other series. Changes Since V4: -- Add primary and secondary I2S pinmux nodes for herobrine specific targets. Changes Since V3: -- Add pinctrl nodes for wcd codec reset and CTIA/OMTP headset selection. Changes Since V2: -- Move lpass pin control node to main dtsi file. -- Sort nodes alphabetically. -- Remove redundant wcd reset gpio nodes. -- Remove redundant input-enable field in dmic pin control nodes. -- Update amp_en node. -- Fix typo errors. -- Modify node names. -- Create patches on latest kernel. Changes Since V1: -- Merge pinmux and pinconf properties in amp_en and wcd pin reset node. -- Split common i2s pin control nodes to functionality specific nodes. -- Move board specific properties to board specific dtsi file. -- Update dmic pin control node name. Srinivasa Rao Mandadapu (2): arm64: dts: qcom: sc7280: Add pinmux for I2S speaker and Headset arm64: dts: qcom: sc7280: add lpass lpi pin controller node arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 98 ++++++++++++++++++++ arch/arm64/boot/dts/qcom/sc7280.dtsi | 148 +++++++++++++++++++++++++++++++ 2 files changed, 246 insertions(+) -- 2.7.4