Received: by 2002:a05:6512:3d0e:0:0:0:0 with SMTP id d14csp7486lfv; Tue, 12 Apr 2022 15:03:58 -0700 (PDT) X-Google-Smtp-Source: ABdhPJytK3DfmDA+dFyapa62c9uSYntrgzlQ0wv0d6GZRSalWRpvSrX+P48dOsjNLa+4Q4s8ELs+ X-Received: by 2002:a05:6a00:1943:b0:4cb:79c9:fa48 with SMTP id s3-20020a056a00194300b004cb79c9fa48mr39755338pfk.47.1649801038432; Tue, 12 Apr 2022 15:03:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1649801038; cv=none; d=google.com; s=arc-20160816; b=eLdIdiSMg+IwDF4QCaA1O9BhrpxIbQEpegyNSo+5S8wcXEZqP2fK5DscjG9j+A3tMC iQR1udoMYfoiK3lnmNpZk0i/9HtYRiL1njyGieDYu6pPg0J6rdZ39QcapfgE0+gvXgeo zcCCIhYa6jYKK6x/1Kt7scgdwGIO8I6XjoyEXgqbFLtXnXzFzTZnXcalLtlG0C1ytAUN WL3n/aO3HvS6SgjXfWYHoZhZE89t3h6k/O904qSy3X+kguzmgnIafupxxrCmuYPtaRUt Q/vVUj/PunWJDlxDP+cJp9IcdCSAc6Vu2poKHhjTAHPuRqPThKpNSiFxl0jRRvY9nJ87 LfDw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:dkim-signature; bh=MyT086vxxCf8akbZ6XQTPCDsqr12qS4HLVmvZSIy5r4=; b=fZgz126nDNrVn7i15vfUgcS3j6liDrPGijeUb05r9xoVp/qFDUcZSa3GqWkeXdaXGJ 3klFsXVCJLn75Wrlx9+hRBila8l5TjpsNh6A/tlZggwFvZTw0hvKuE46UIyHWyOj1wBZ QBszC7l+GZA8QlOyofHtA90JSA1j++z0iq/gi5Fgie1flgzAlC2hPf9GnvH1xR1ceCH0 hz+smB166w/df/IJvhQrcWAuqghkAqo5B3x4UAgOa/A6JAV1BPjuG1KfF5T8k4R/DuX2 X1ZP6vGwTjMl8S0f3o2bW+cYeJLyEieUNqBzwg4u+HcrxjuozQEdGxBkqU44ZaOViUbO X8zQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@microchip.com header.s=mchp header.b="ny8cfY/v"; spf=softfail (google.com: domain of transitioning linux-kernel-owner@vger.kernel.org does not designate 23.128.96.19 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Return-Path: Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net. [23.128.96.19]) by mx.google.com with ESMTPS id l7-20020a17090270c700b00153b2d1649bsi11686690plt.163.2022.04.12.15.03.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 Apr 2022 15:03:58 -0700 (PDT) Received-SPF: softfail (google.com: domain of transitioning linux-kernel-owner@vger.kernel.org does not designate 23.128.96.19 as permitted sender) client-ip=23.128.96.19; Authentication-Results: mx.google.com; dkim=fail header.i=@microchip.com header.s=mchp header.b="ny8cfY/v"; spf=softfail (google.com: domain of transitioning linux-kernel-owner@vger.kernel.org does not designate 23.128.96.19 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 9A12C160168; Tue, 12 Apr 2022 13:55:41 -0700 (PDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344203AbiDKJM6 (ORCPT + 99 others); Mon, 11 Apr 2022 05:12:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48184 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1343754AbiDKJMw (ORCPT ); Mon, 11 Apr 2022 05:12:52 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3663418E26 for ; Mon, 11 Apr 2022 02:10:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1649668240; x=1681204240; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=zIRYPCBuYDuGaaJFVQUJJswCne5BuSs6kiWW7gKe1Wk=; b=ny8cfY/vGdaGZOt27sZnmV+hkkgu+Bl1OhrmksE0svonZHUYv+XfwyDT 8mtef8t949G7rgcEb865LQb0UI29RWH1QR17vlNzADufvYa4LAbMcI0pu sDDy8gRvUmD7LkcDnMmrqmNpR8hdb3Zb204Fpds/guHEO1az5lJZee3m7 0lGarrTyqUrITSVcYnJrSlIbBtDTMu6taR0iPI3ajhDJUNhaWBWv/FE1p LmSW16FUtG6u73u33IL66OwenOp9AV4pm47QwYo4/mB1bTCFnWsZDET1z FcHXpXMNTIZXWuda9YvzUc5wuVLdkkk9edwXw/JJ85uuti+jrjaDIqErB Q==; X-IronPort-AV: E=Sophos;i="5.90,251,1643698800"; d="scan'208";a="152208105" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 11 Apr 2022 02:10:39 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Mon, 11 Apr 2022 02:10:37 -0700 Received: from ROB-ULT-M18064N.mchp-main.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Mon, 11 Apr 2022 02:10:35 -0700 From: Tudor Ambarus To: , CC: , , , , , , Tudor Ambarus Subject: [PATCH v3 0/9] mtd: spi-nor: Rework Octal DTR methods Date: Mon, 11 Apr 2022 12:10:24 +0300 Message-ID: <20220411091033.98754-1-tudor.ambarus@microchip.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Spam-Status: No, score=-1.7 required=5.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,RDNS_NONE, SPF_HELO_NONE,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org v3: - queue patch: "mtd: spi-nor: Introduce templates for SPI NOR operations" from https://lore.kernel.org/lkml/20220304093011.198173-1-tudor.ambarus@microchip.com/ The dependancy chain between patches was too long and hard to follow. - Rework patch "mtd: spi-nor: core: Use auto-detection only once" according to Pratyush's and Michael's suggestions - Remove dev_dbg messge from spi_nor_read_id() method and let the callers use their own message (detection, octal dtr enable/disable) - detailed version changes in each patch v2: - Fix bug on octal dtr disable, s/nor->reg_proto/SNOR_PROTO_1_1_1, because after disable the nor->proto is not yet updated - update function/macros names to comply with Michael's rename series. Tudor Ambarus (9): mtd: spi-nor: Rename method, s/spi_nor_match_id/spi_nor_match_name mtd: spi-nor: Introduce spi_nor_match_id() mtd: spi-nor: core: Use auto-detection only once mtd: spi-nor: core: Introduce method for RDID op mtd: spi-nor: manufacturers: Use spi_nor_read_id() core method mtd: spi-nor: core: Add helpers to read/write any register mtd: spi-nor: micron-st: Rework spi_nor_micron_octal_dtr_enable() mtd: spi-nor: spansion: Rework spi_nor_cypress_octal_dtr_enable() mtd: spi-nor: Introduce templates for SPI NOR operations drivers/mtd/spi-nor/core.c | 249 ++++++++++++++++---------------- drivers/mtd/spi-nor/core.h | 115 +++++++++++++++ drivers/mtd/spi-nor/micron-st.c | 142 +++++++++--------- drivers/mtd/spi-nor/spansion.c | 161 +++++++++++---------- drivers/mtd/spi-nor/xilinx.c | 12 +- 5 files changed, 405 insertions(+), 274 deletions(-) -- 2.25.1