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From:   Doug Anderson <dianders@chromium.org>
Date:   Tue, 12 Apr 2022 10:42:45 -0700
Message-ID: <CAD=FV=VicFiX6QkBksZs1KLwJ5x4eCte6j5RWOBPN+WwiXm2Cw@mail.gmail.com>
Subject: Re: [PATCH v8 1/2] arm64: dts: qcom: sc7280: Add pinmux for I2S
 speaker and Headset
To:     Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Cc:     Bjorn Andersson <bjorn.andersson@linaro.org>,
        Andy Gross <agross@kernel.org>,
        Rob Herring <robh+dt@kernel.org>,
        linux-arm-msm <linux-arm-msm@vger.kernel.org>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@vger.kernel.org>, LKML <linux-kernel@vger.kernel.org>,
        quic_rohkumar@quicinc.com,
        Srinivas Kandagatla <srinivas.kandagatla@linaro.org>,
        Stephen Boyd <swboyd@chromium.org>,
        Judy Hsiao <judyhsiao@chromium.org>,
        Venkata Prasad Potturu <quic_potturu@quicinc.com>
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Precedence: bulk

Hi,

On Tue, Apr 12, 2022 at 7:43 AM Srinivasa Rao Mandadapu
<quic_srivasam@quicinc.com> wrote:
>
> On 4/12/2022 8:03 PM, Bjorn Andersson wrote:
> Thanks for your time Bjorn!!!
> > On Tue 12 Apr 08:14 CDT 2022, Srinivasa Rao Mandadapu wrote:
> >
> >> Add pinmux nodes for primary and secondary I2S for SC7280 based platforms.
> >>
> >> Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
> >> Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
> >> Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
> >> ---
> >>   arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 14 +++++++++++
> >>   arch/arm64/boot/dts/qcom/sc7280.dtsi     | 40 ++++++++++++++++++++++++++++++++
> >>   2 files changed, 54 insertions(+)
> >>
> >> diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
> >> index ecbf2b8..1fc94b5 100644
> >> --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
> >> +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
> >> @@ -359,6 +359,20 @@
> >>      bias-disable;
> >>   };
> >>
> >> +&mi2s1_data0 {
> >> +    drive-strength = <6>;
> >> +    bias-disable;
> >> +};
> >> +
> >> +&mi2s1_sclk {
> >> +    drive-strength = <6>;
> >> +    bias-disable;
> >> +};
> >> +
> >> +&mi2s1_ws {
> >> +    drive-strength = <6>;
> >> +};
> >> +
> >>   &pm7325_gpios {
> >>      key_vol_up_default: key-vol-up-default {
> >>              pins = "gpio6";
> >> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> >> index f0b64be..6e6cfeda 100644
> >> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> >> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> >> @@ -3522,6 +3522,46 @@
> >>                              function = "edp_hot";
> >>                      };
> >>
> >> +                    mi2s0_data0: mi2s0-data0 {
> > Are these ever going to be selected individually, or could this be:
> >
> > mi2s0_state: mi2s0-state {
> >       data0 {
> >               ...;
> >       };
> >
> >       data1 {
> >               ...;
> >       };
> >
> >       mclk {
> >               ...;
> >       };
> >
> >       etc
> > };
> >
> > mi2s1-state {
> >       ...;
> > };
> >
> > And then a single pinctrl-0 = <&mi2c0_state>;
> >
> > Regards,
> > Bjorn
>
> We are not selecting individually. Actually we were following the same,
> but Doug Anderson suggested this way of handling in 1st version of patches.
>
> So changed accordingly.

Right. The problem with the syntax Bjorn is suggesting is that it's
harder for board files to override. They essentially have to replicate
your hierarchy in their board file when they're setting drive
strengths / pullups and that gives them the chance to make typos in
the names of the nodes. It also means that if someone
reorganizes/renames the pinctrl in the SoC dtsi file that it could
unintentionally break a board. I talked about this a little in commit
f9800dde34e6 ("arm64: dts: qcom: sc7280: Clean up sdc1 / sdc2
pinctrl").

-Doug