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Received: from BYAPR12MB4614.namprd12.prod.outlook.com (2603:10b6:a03:a6::22) by DM6PR12MB3978.namprd12.prod.outlook.com (2603:10b6:5:1c5::14) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5144.29; Wed, 13 Apr 2022 04:29:17 +0000 Received: from BYAPR12MB4614.namprd12.prod.outlook.com ([fe80::f110:5c81:79d0:a302]) by BYAPR12MB4614.namprd12.prod.outlook.com ([fe80::f110:5c81:79d0:a302%6]) with mapi id 15.20.5164.019; Wed, 13 Apr 2022 04:29:17 +0000 Message-ID: <6c2aae03-f873-c673-ab93-d665831a2def@amd.com> Date: Wed, 13 Apr 2022 09:59:00 +0530 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.3.2 Subject: Re: [PATCHv4] drm/amdgpu: disable ASPM on Intel Alder Lake based systems Content-Language: en-US To: Richard Gong , alexander.deucher@amd.com, christian.koenig@amd.com, xinhui.pan@amd.com, airlied@linux.ie, daniel@ffwll.ch Cc: amd-gfx@lists.freedesktop.org, kernel test robot , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, mario.limonciello@amd.com References: <20220412215000.897344-1-richard.gong@amd.com> From: "Lazar, Lijo" In-Reply-To: <20220412215000.897344-1-richard.gong@amd.com> Content-Type: text/plain; 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Using these GFX cards as > video/display output, Intel Alder Lake based systems will hang during > suspend/resume. > > The issue was initially reported on one system (Dell Precision 3660 with > BIOS version 0.14.81), but was later confirmed to affect at least 4 Alder > Lake based systems. > > Add extra check to disable ASPM on Intel Alder Lake based systems. > > Fixes: 0064b0ce85bb ("drm/amd/pm: enable ASPM by default") > Link: https://gitlab.freedesktop.org/drm/amd/-/issues/1885 > Reported-by: kernel test robot > Signed-off-by: Richard Gong Reviewed-by: Lijo Lazar Thanks, Lijo > --- > v4: s/CONFIG_X86_64/CONFIG_X86 > enhanced check logic > v3: s/intel_core_asom_chk/aspm_support_quirk_check > correct build error with W=1 option > v2: correct commit description > move the check from chip family to problematic platform > --- > drivers/gpu/drm/amd/amdgpu/vi.c | 17 ++++++++++++++++- > 1 file changed, 16 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c > index 039b90cdc3bc..b33e0a9bee65 100644 > --- a/drivers/gpu/drm/amd/amdgpu/vi.c > +++ b/drivers/gpu/drm/amd/amdgpu/vi.c > @@ -81,6 +81,10 @@ > #include "mxgpu_vi.h" > #include "amdgpu_dm.h" > > +#if IS_ENABLED(CONFIG_X86) > +#include > +#endif > + > #define ixPCIE_LC_L1_PM_SUBSTATE 0x100100C6 > #define PCIE_LC_L1_PM_SUBSTATE__LC_L1_SUBSTATES_OVERRIDE_EN_MASK 0x00000001L > #define PCIE_LC_L1_PM_SUBSTATE__LC_PCI_PM_L1_2_OVERRIDE_MASK 0x00000002L > @@ -1134,13 +1138,24 @@ static void vi_enable_aspm(struct amdgpu_device *adev) > WREG32_PCIE(ixPCIE_LC_CNTL, data); > } > > +static bool aspm_support_quirk_check(void) > +{ > + if (IS_ENABLED(CONFIG_X86)) { > + struct cpuinfo_x86 *c = &cpu_data(0); > + > + return !(c->x86 == 6 && c->x86_model == INTEL_FAM6_ALDERLAKE); > + } > + > + return true; > +} > + > static void vi_program_aspm(struct amdgpu_device *adev) > { > u32 data, data1, orig; > bool bL1SS = false; > bool bClkReqSupport = true; > > - if (!amdgpu_device_should_use_aspm(adev)) > + if (!amdgpu_device_should_use_aspm(adev) || !aspm_support_quirk_check()) > return; > > if (adev->flags & AMD_IS_APU || >