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[2620:137:e000::1:20]) by mx.google.com with ESMTP id oc3-20020a17090b1c0300b001c989dd2452si16205372pjb.173.2022.04.13.10.59.54; Wed, 13 Apr 2022 11:00:11 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcdkim header.b="qO/DA7yg"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233064AbiDMOqw (ORCPT + 99 others); Wed, 13 Apr 2022 10:46:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36580 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233605AbiDMOqr (ORCPT ); Wed, 13 Apr 2022 10:46:47 -0400 Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 38F892FE46; Wed, 13 Apr 2022 07:44:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1649861066; x=1681397066; h=from:to:cc:subject:date:message-id:mime-version; bh=9/iljYYaTUc5T2GyURSpJX+UK4UCfapsneASdKEHPXA=; b=qO/DA7ygb/zW+GpwM0gTa0toiivJbMMyb2KIhsGxXb1lF3ZHXxOAbNN4 1h3rtpkHi2wv9J1ToP2kmApP5s5vFpVVWsJn7LjWJCR+IkD8XGA/feS1A VaQzG4P8uSWLld+vIi7fYK9frXetyrIHEWfEmvGhHJ4xynmdhkYFoQucX Q=; Received: from ironmsg07-lv.qualcomm.com ([10.47.202.151]) by alexa-out.qualcomm.com with ESMTP; 13 Apr 2022 07:44:26 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg07-lv.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Apr 2022 07:44:25 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Wed, 13 Apr 2022 07:44:25 -0700 Received: from hu-srivasam-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Wed, 13 Apr 2022 07:44:21 -0700 From: Srinivasa Rao Mandadapu To: , , , , , , , , , , CC: Srinivasa Rao Mandadapu Subject: [PATCH v9 0/2] Add lpass pin control support for audio on sc7280 based targets Date: Wed, 13 Apr 2022 20:14:05 +0530 Message-ID: <1649861047-7811-1-git-send-email-quic_srivasam@quicinc.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch set is to add lpass pin control support for Audio over I2S, wcd codec and digital mics. This patch set depends on: -- Lpass-lpi pinctrl patches [https://patchwork.kernel.org/project/alsa-devel/list/?series=623951&archive=both&state=*] Changes Since V8: -- Modify label and node names to lpass specific. -- Sort nodes as per node names and kind of nodes like pinctrl and device nodes. Changes Since V7: -- Sort mi2s pincontrol nodes as per node name. -- Fix typo errors. Changes Since V6: -- Move amp_en node to corresponding consumer patch. -- Update label and node names. -- Remove redundant drive-strengths. -- Remove herobrine crd specific mi2s configuration. Changes Since V5: -- Remove redundant function property in amp_en node. -- Move board specific properties of lpass pin control node to board specific file. -- Remove redundant properties in pin control nodes. -- Move wcd938x codec reset and CTIA/OMTP pin control patches to other series. Changes Since V4: -- Add primary and secondary I2S pinmux nodes for herobrine specific targets. Changes Since V3: -- Add pinctrl nodes for wcd codec reset and CTIA/OMTP headset selection. Changes Since V2: -- Move lpass pin control node to main dtsi file. -- Sort nodes alphabetically. -- Remove redundant wcd reset gpio nodes. -- Remove redundant input-enable field in dmic pin control nodes. -- Update amp_en node. -- Fix typo errors. -- Modify node names. -- Create patches on latest kernel. Changes Since V1: -- Merge pinmux and pinconf properties in amp_en and wcd pin reset node. -- Split common i2s pin control nodes to functionality specific nodes. -- Move board specific properties to board specific dtsi file. -- Update dmic pin control node name. Srinivasa Rao Mandadapu (2): arm64: dts: qcom: sc7280: Add pinmux for I2S speaker and Headset arm64: dts: qcom: sc7280: add lpass lpi pin controller node arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 98 +++++++++++++++++++++ arch/arm64/boot/dts/qcom/sc7280.dtsi | 147 +++++++++++++++++++++++++++++++ 2 files changed, 245 insertions(+) -- 2.7.4