Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
Message-ID: <6595f202-670c-a47d-dd56-e7ca39df2db2@intel.com>
Date:   Wed, 13 Apr 2022 12:12:50 -0700
User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101
 Thunderbird/91.7.0
Subject: Re: [Intel-gfx] [PATCH 14/20] drm/i915/dg2: add gsc with special gsc
 bar offsets
Content-Language: en-US
To:     Alexander Usyskin <alexander.usyskin@intel.com>,
        Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
        Jani Nikula <jani.nikula@linux.intel.com>,
        Joonas Lahtinen <joonas.lahtinen@linux.intel.com>,
        Rodrigo Vivi <rodrigo.vivi@intel.com>,
        David Airlie <airlied@linux.ie>,
        Daniel Vetter <daniel@ffwll.ch>,
        Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
CC:     <linux-kernel@vger.kernel.org>,
        Tomas Winkler <tomas.winkler@intel.com>,
        Vitaly Lubart <vitaly.lubart@intel.com>,
        <intel-gfx@lists.freedesktop.org>
References: <20220407125839.1479249-1-alexander.usyskin@intel.com>
 <20220407125839.1479249-15-alexander.usyskin@intel.com>
From:   "Ceraolo Spurio, Daniele" <daniele.ceraolospurio@intel.com>
In-Reply-To: <20220407125839.1479249-15-alexander.usyskin@intel.com>
Content-Type: text/plain; charset="UTF-8"; format=flowed
Content-Transfer-Encoding: 7bit
MIME-Version: 1.0
X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1
X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?VkZLMEJlcTA2THVzck9wYUk3a0VEZFJlTnk5dEVTZU9aWE1ZUkJMVlV4ak5h?=
 =?utf-8?B?UEpTaVhxU3c4NXNUYVFQS1pFa1BQcHFaUXdwdGxjSXZFMnFRMnAvN3QzMnJ1?=
 =?utf-8?B?QU5hb0Q4SHVxV2ZxUXU0VVJ4WVozemNQSDVqb2JwektDU0FyNkJ1LzZ3VmJF?=
 =?utf-8?B?ZFBnR2R0N2tzTkdhQTh5aW1jbW50M3Iwd2FNdGpxNEZTbnZWd3pqZWNxWEl3?=
 =?utf-8?B?OTFyRVd2MTFJWjlHZlRnWVgwVTdGVFdSYjVFUkpCVWhqMTdJK2RDSXFEK05L?=
 =?utf-8?B?UU5IWXkwY3V0QnE5dkdRc215N1Bucm83TXJMZUc2Zjl6S3dxQ0szbENDMEFB?=
 =?utf-8?B?WDYvK3BsT2lMb01nNjJGUEdKUUt4SzI5SHVJQXFxTXVIdjN1YzhsYjBwSlFH?=
 =?utf-8?B?d3hGTjZzNFQ3RzRTNGNLQkE0MlBlNW50bm1WTjZUdElUN0oydnd1aEtjM2JZ?=
 =?utf-8?B?RW40Z0NiY0w3dysyVk1jblB3QzRYaExMZlkzRzZSbGpvQTVhcGJqKzdNZXZC?=
 =?utf-8?B?R0pFZk5qM3djT2FXOWgyV092Nkp4WGdRN0IrNzBjUVQ5VVhRSWdDc2Z3RVJ6?=
 =?utf-8?B?ZVJTT25mOTdsSk5nTGE2NGpsR1FCUTd1R1gzQmdSakl6YWxCMzhuekFNQXpN?=
 =?utf-8?B?SmVnbWtIVm5hV04xMDhpM1NLaXVYZFpCUlk5NGE2eExXNW9RelNyTHR4VzB2?=
 =?utf-8?B?amdMTW9WYzdtVGtuSXhvV0pYL0xXTGpMS0g5Y0l0a1J0Z2tXUkhNTHJBYmEx?=
 =?utf-8?B?dXNsVHR5ZjAycWhuczc1bEFvRWs3WExVcDd5Mjgvb2dQdlNXZzRlcjNUWG5v?=
 =?utf-8?B?SEx2eUhtK0s0bkNqVEZxRFJ2Q3hhWWYvcTdMbWNHRjdSVkJNRVIrMnVVQnVk?=
 =?utf-8?B?QVkrM0tRL0VCVHk1cTlzeWw0U3pCM1craWQ5cXVwdUREODhqK2dtNWNZVVR5?=
 =?utf-8?B?K2dTWEVOVnBrRDlkZmY2WFRwU1h1UnZUTjQwTm1MaFJaUXJ5U0JEUjlIVTlj?=
 =?utf-8?B?d0U3ZGJ0RlA5OXU3YUpWK2VBVVU1d3VaaUJ2YWVGeWovbzJXdmdTTWNoNUx6?=
 =?utf-8?B?SkNQN3dDd0VTcU9DdFhWZS8rRGlmbFhVOHVFemRjUGxIU0lZOUJoZC9WYStx?=
 =?utf-8?B?UFVFMzNySnhXb0tWWHd1cStibzVjc3YzMUEyL3NwQ1l4R1VqRlk1TjdYZ0J0?=
 =?utf-8?B?Vyt1T2dVOWtCMEJ3SUxYRXpyNWYra3lpVis1N3FrWkZXR0RKZmlEYzcwNUhl?=
 =?utf-8?B?eTRWR2RDRTR2dmJjWkpNV2lwZTRyVzg5VkNXd3A1Rm1DNTlZQ3QwVGJDbDJq?=
 =?utf-8?B?a0VmVjN1MW9KRUFDczVSWmx5MnMzejB6WlFqTGptRks4UWZkRnY3Y0pscldq?=
 =?utf-8?B?Vi9JR1NZbEN2bzVIbHBzallrWXNVY2N6ekVYcURnR0VBL2RJcitEQzE0V0tm?=
 =?utf-8?B?enNBK1NwNjFCUmtrRUlvdE5SMmRBcURnd2gwNjYwZHR4Qk1HOG9LcGMyaXB0?=
 =?utf-8?B?ZGhnSEVDU054UXJ0ekZKeWlUT3VtUFFrbE4wcXZqTUpkdTgxdHZ4QVBmRmV4?=
 =?utf-8?B?c1c4WlB4S2NhWGtKaU00N1ZLd25pTnEvZHdpeXRvTUE1UXluYVNpVHhNbkVP?=
 =?utf-8?B?OEdpQzBtOWdQeTB6TkltSXk1bTRHZVRrQStINGFqaU5rSUNqNjdYelVxUHU3?=
 =?utf-8?B?QzJHbkhpSWZIUGtqL1BqVm5GeEVkcFQ1MUs2UlBUbWVCc1pnOUo4T0dJQ2pu?=
 =?utf-8?B?bEhadzgxeEFMdlZqSWROZnhQQXhMdnNMZ1Z0RnRwZ080dmdJWmtROHNzVEtu?=
 =?utf-8?B?cnVQQ3RFdXRhblBpSG1wR2FTN2xIa00rbE43K0V2RjJqckcraTFqS1QyTFlh?=
 =?utf-8?B?QWhXOVhGVW15OTFaTjJZVWw3M0lqNzVPNW53SmhFMTJkNDBtV3BxTzNoMURG?=
 =?utf-8?B?azFSUGRxaUlTWHpyVDVrZ3VHaUN3eDlTV3FPUlRQVU5Kam9RZXZkY0NxN2g5?=
 =?utf-8?B?TEk4QVNSSDZITHQ4NjJGUzAvTzhoWC9EVU83TnZJU1BVaDZ3NU1YdE9NR04v?=
 =?utf-8?B?VjR0eEtUL2ZVR29zVHVVSko4Z1ZkUFJDeEExYVU3bDRLU3dVZzBvQ3BrOGhW?=
 =?utf-8?B?RTFsWVNjYk9HdjNkYVhxUmIxSjM1ZXlENjdJVGdoRzVOb09EYUE1bFc3b2sv?=
 =?utf-8?B?VHFQK29LNG56SUNXRHUxeEgxY3JTMmdXbDRpa3hqMUZzeXlObVJCSGdnT3ZK?=
 =?utf-8?B?SXZOZ2lRYlk4dk8yMU5RZlA4MFA2OUlHamdrUCtQc0xGVDJaNHFDTmdFNVli?=
 =?utf-8?B?WERNWDdCckw5SnozaGhVNWFubVgrUXNyTjZGUDJxTEtSMVcvaTNWT1pvUGNy?=
 =?utf-8?Q?XxEmLjblDuo+0hBBgHiGQ7mAgTEDePLdh0JD0?=
X-MS-Exchange-CrossTenant-Network-Message-Id: 60a70ee9-9417-4091-fc07-08da1d819c16
X-MS-Exchange-CrossTenant-AuthSource: DM4PR11MB5488.namprd11.prod.outlook.com
X-MS-Exchange-CrossTenant-AuthAs: Internal
X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Apr 2022 19:12:53.5260
 (UTC)
X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted
X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d
X-MS-Exchange-CrossTenant-MailboxType: HOSTED
X-MS-Exchange-CrossTenant-UserPrincipalName: 2UVmYVsD23TPXst6hp5e9ON3Uf5TbIVf7Cmgt0Dn15CMfzCc9GN6FfiycOmC6qZywkmWfHbBW9e5hwYGJAesrDB1tinF251fGzbypFDWUZs=
X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR1101MB2234
X-OriginatorOrg: intel.com
X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH,
        DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,
        RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE
        autolearn=ham autolearn_force=no version=3.4.6
X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on
        lindbergh.monkeyblade.net
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org


On 4/7/2022 5:58 AM, Alexander Usyskin wrote:
> From: Tomas Winkler <tomas.winkler@intel.com>
>
> DG2 uses different GSC offsets on memory bar
> and uses PXP head (HECI1).
>
> Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
> Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>

Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

Daniele

> ---
>   drivers/gpu/drm/i915/gt/intel_gsc.c | 15 +++++++++++++++
>   drivers/gpu/drm/i915/i915_pci.c     |  1 +
>   drivers/gpu/drm/i915/i915_reg.h     |  2 ++
>   3 files changed, 18 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_gsc.c b/drivers/gpu/drm/i915/gt/intel_gsc.c
> index ffe6716590f0..bfc307e49bf9 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gsc.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gsc.c
> @@ -69,6 +69,19 @@ static const struct gsc_def gsc_def_xehpsdv[] = {
>   	}
>   };
>   
> +static const struct gsc_def gsc_def_dg2[] = {
> +	{
> +		.name = "mei-gsc",
> +		.bar = DG2_GSC_HECI1_BASE,
> +		.bar_size = GSC_BAR_LENGTH,
> +	},
> +	{
> +		.name = "mei-gscfi",
> +		.bar = DG2_GSC_HECI2_BASE,
> +		.bar_size = GSC_BAR_LENGTH,
> +	}
> +};
> +
>   static void gsc_release_dev(struct device *dev)
>   {
>   	struct auxiliary_device *aux_dev = to_auxiliary_dev(dev);
> @@ -109,6 +122,8 @@ static void gsc_init_one(struct drm_i915_private *i915,
>   		def = &gsc_def_dg1[intf_id];
>   	} else if (IS_XEHPSDV(i915)) {
>   		def = &gsc_def_xehpsdv[intf_id];
> +	} else if (IS_DG2(i915)) {
> +		def = &gsc_def_dg2[intf_id];
>   	} else {
>   		drm_warn_once(&i915->drm, "Unknown platform\n");
>   		return;
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 06e6dad0d7f7..cb6dcc3f48f4 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -1051,6 +1051,7 @@ static const struct intel_device_info xehpsdv_info = {
>   	.has_4tile = 1, \
>   	.has_64k_pages = 1, \
>   	.has_guc_deprivilege = 1, \
> +	.has_heci_pxp = 1, \
>   	.needs_compact_pt = 1, \
>   	.platform_engine_mask = \
>   		BIT(RCS0) | BIT(BCS0) | \
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 1dd7b7de6002..efcfe32cd8eb 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -978,6 +978,8 @@
>   #define BLT_RING_BASE		0x22000
>   #define DG1_GSC_HECI1_BASE	0x00258000
>   #define DG1_GSC_HECI2_BASE	0x00259000
> +#define DG2_GSC_HECI1_BASE	0x00373000
> +#define DG2_GSC_HECI2_BASE	0x00374000
>   
>   
>