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Date:   Thu, 14 Apr 2022 11:07:44 +0530
From:   Vinod Koul <vkoul@kernel.org>
To:     Liu Ying <victor.liu@nxp.com>
Cc:     linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org,
        devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org,
        linux-arm-kernel@lists.infradead.org, kishon@ti.com,
        robh+dt@kernel.org, andrzej.hajda@intel.com,
        narmstrong@baylibre.com, Laurent.pinchart@ideasonboard.com,
        jonas@kwiboo.se, jernej.skrabec@gmail.com, airlied@linux.ie,
        daniel@ffwll.ch, shawnguo@kernel.org, s.hauer@pengutronix.de,
        kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com,
        agx@sigxcpu.org, robert.chiras@nxp.com, martin.kepplinger@puri.sm,
        robert.foss@linaro.org
Subject: Re: [PATCH v6 resend 2/5] phy: Add LVDS configuration options
Message-ID: <YlezKAw+W8HOa322@matsya>
References: <20220402052451.2517469-1-victor.liu@nxp.com>
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 <d77b41d911e126331138ddaca146a581d316bd09.camel@nxp.com>
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On 13-04-22, 20:39, Liu Ying wrote:
> On Wed, 2022-04-13 at 16:19 +0530, Vinod Koul wrote:
> > On 13-04-22, 18:04, Liu Ying wrote:
> > > Hi Vinod,
> > > 
> > > On Wed, 2022-04-13 at 11:41 +0530, Vinod Koul wrote:
> > > > On 02-04-22, 13:24, Liu Ying wrote:
> > > > > This patch allows LVDS PHYs to be configured through
> > > > > the generic functions and through a custom structure
> > > > > added to the generic union.
> > > > > 
> > > > > The parameters added here are based on common LVDS PHY
> > > > > implementation practices.  The set of parameters
> > > > > should cover all potential users.
> > > > > 
> > > > > Cc: Kishon Vijay Abraham I <kishon@ti.com>
> > > > > Cc: Vinod Koul <vkoul@kernel.org>
> > > > > Cc: NXP Linux Team <linux-imx@nxp.com>
> > > > > Signed-off-by: Liu Ying <victor.liu@nxp.com>
> > > > > ---
> 
> [...]
> 
> > > > > + */
> > > > > +
> > > > > +#ifndef __PHY_LVDS_H_
> > > > > +#define __PHY_LVDS_H_
> > > > > +
> > > > > +/**
> > > > > + * struct phy_configure_opts_lvds - LVDS configuration set
> > > > > + * @bits_per_lane_and_dclk_cycle:	Number of bits per data
> > > > > lane
> > > > > and
> > > > > + *					differential clock
> > > > > cycle.
> > > > 
> > > > What does it mean by bits per data lane and differential clock
> > > > cycle?
> > > 
> > > Please check
> > > Documentation/devicetree/bindings/display/panel/lvds.yaml.
> > > lvds.yaml metions slot.  'bits_per_lane_and_dclk_cycle' means the
> > > number of slots.  But, I don't find the word 'slot' in my lvds
> > > relevant
> > > specs which mentioned in lvds.yaml, so 'slots' is probably not a
> > > generic name(lvds.yaml is for display panel).  So, I use
> > > 'bits_per_lane_and_dclk_cycle' as the name tells what it means.
> > 
> > variable name is fine, explanation for bit per lane and differential
> > clock cycle didnt help, maybe add better explanation of what this
> > variable means
> 
> I may add an example diagram as below...

Not really a diagram, you can add if you like.. But something which
explains in a sentence or few about the variable.

bits per lane per differential clock cycle ?

-- 
~Vinod