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Message-ID: <534dbd19-b43b-63e6-69e0-3441dd224ef0@nvidia.com>
Date:   Thu, 14 Apr 2022 11:01:44 +0530
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Subject: Re: [Patch v7 2/4] memory: tegra: Add MC error logging on tegra186
 onward
Content-Language: en-US
To:     Dmitry Osipenko <dmitry.osipenko@collabora.com>, digetx@gmail.com,
        krzysztof.kozlowski@linaro.org, thierry.reding@gmail.com,
        jonathanh@nvidia.com, robh+dt@kernel.org,
        linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
        linux-tegra@vger.kernel.org, krzysztof.kozlowski+dt@linaro.org
Cc:     vdumpa@nvidia.com, Snikam@nvidia.com
References: <20220413094012.13589-1-amhetre@nvidia.com>
 <20220413094012.13589-3-amhetre@nvidia.com>
 <eeb513c9-f010-c45b-bca6-a10c96691147@collabora.com>
From:   Ashish Mhetre <amhetre@nvidia.com>
In-Reply-To: <eeb513c9-f010-c45b-bca6-a10c96691147@collabora.com>
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On 4/14/2022 2:43 AM, Dmitry Osipenko wrote:
> External email: Use caution opening links or attachments
> 
> 
> On 4/13/22 12:40, Ashish Mhetre wrote:
>> +irqreturn_t tegra30_mc_handle_irq(int irq, void *data)
>>   {
>>        struct tegra_mc *mc = data;
>> +     unsigned int bit, channel;
>>        unsigned long status;
>> -     unsigned int bit;
>>
>> -     /* mask all interrupts to avoid flooding */
>> -     status = mc_readl(mc, MC_INTSTATUS) & mc->soc->intmask;
>> +     if (mc->soc->num_channels) {
>> +             u32 global_status;
>> +             int err;
>> +
>> +             global_status = mc_ch_readl(mc, MC_BROADCAST_CHANNEL, MC_GLOBAL_INTSTATUS);
> 
> This will crash if mc->bcast_ch_regs = ERR_PTR(-EINVAL) for older dtbs.

Actually interrupts won't occur till we write MC_INTMASK register from
broadcast channel with appropriate intmask value. I have added check in
tegra_mc_probe() while registering irq which will write MC_INTMASK from
broadcast only when mc->bcast_ch_regs is initialized i.e.
!IS_ERR(mc->bcast_ch_regs).
So interrupt handler won't be triggered at all if
mc->bcast_ch_regs = ERR_PTR(-EINVAL).