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[2620:137:e000::1:20]) by mx.google.com with ESMTP id a4-20020a63e404000000b003863915bbb4si8257063pgi.673.2022.04.14.08.20.11; Thu, 14 Apr 2022 08:20:27 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@sholland.org header.s=fm2 header.b=fnbQiRCW; dkim=pass header.i=@messagingengine.com header.s=fm1 header.b="JN/u/DVS"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237978AbiDMWWl (ORCPT + 99 others); Wed, 13 Apr 2022 18:22:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39270 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236884AbiDMWWE (ORCPT ); Wed, 13 Apr 2022 18:22:04 -0400 Received: from out5-smtp.messagingengine.com (out5-smtp.messagingengine.com [66.111.4.29]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 202DC220F1; Wed, 13 Apr 2022 15:19:38 -0700 (PDT) Received: from compute5.internal (compute5.nyi.internal [10.202.2.45]) by mailout.nyi.internal (Postfix) with ESMTP id 017155C0337; Wed, 13 Apr 2022 18:19:38 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute5.internal (MEProxy); Wed, 13 Apr 2022 18:19:38 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sholland.org; h= cc:cc:content-transfer-encoding:date:date:from:from:in-reply-to :in-reply-to:message-id:mime-version:references:reply-to:sender :subject:subject:to:to; s=fm2; t=1649888377; x=1649974777; bh=tY YXooyzfoVASIVFw46sk2jtQuSFQj7O0CjADjvQKS4=; b=fnbQiRCWZKoa6P2AFl UCN2cUs8hriQsg+DTZJBhg6fKGCwumuG62IEDgTeIiEx9yd5Y1F2hMRzmAcFysU5 cS5hbbwRvTDrqSiI42YGA1xc24+rimiICmi7tDg7maQ+IZmLT79JX6fRm2/kIlnX AdnUOwD50xQ/TZGy5Gk/gMqwVhyiKLYduZRYZ36jurBvH52iY4pT3Nl2aod3hUc5 6iGJqiTgMBuhEAHhi1wcQ/oUMksynJiu0PMEoflM0ten8rn0ZVXh2BO+hHQiVrIB +4BmFZAJ1a7YP5ChIryCqaxBdjOabDNj1b7qNr4rtu3rdHfBlbYicnlssHQHBNvl 0AXQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding:date:date :from:from:in-reply-to:in-reply-to:message-id:mime-version :references:reply-to:sender:subject:subject:to:to:x-me-proxy :x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s=fm1; t= 1649888377; x=1649974777; bh=tYYXooyzfoVASIVFw46sk2jtQuSFQj7O0Cj ADjvQKS4=; b=JN/u/DVSKTUMgkOEo/iiZMZiOEglinf5P/JGht+fnQMEX2vTL6r O8uAgoyL3b3P8vqeTD6RQk37E9K/+khwTK14Lb31637ClNaOGPkF+em+6t7aBayA eJ/b0tyMz8afdMlBiDmDzZLzCIoHbYvyrFE3iy7fAqjgzemvzHdEPcIhlEwhDlez VKMjbIU8z3XpSxUByu4aKmIosWw+sncCKB2cxPzO32OYF1vrtoEOFEmeU6yHDszL BoNSU8UuuTaEEqA8kMhNz815ly6AKTi5c1Ep8EoYIDNrc1/Ecr2OZ6GBMpO0Z7BJ 2B0/IA6LoAqWwKojy5gqAufaOx4Q9tQ/8MA== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvvddrudelvddgtdelucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvufffkffojghfggfgsedtkeertdertddtnecuhfhrohhmpefurghmuhgv lhcujfholhhlrghnugcuoehsrghmuhgvlhesshhhohhllhgrnhgurdhorhhgqeenucggtf frrghtthgvrhhnpeduhfejfedvhffgfeehtefghfeiiefgfeehgfdvvdevfeegjeehjedv gfejheeuieenucevlhhushhtvghrufhiiigvpedvnecurfgrrhgrmhepmhgrihhlfhhroh hmpehsrghmuhgvlhesshhhohhllhgrnhgurdhorhhg X-ME-Proxy: Received: by mail.messagingengine.com (Postfix) with ESMTPA; Wed, 13 Apr 2022 18:19:37 -0400 (EDT) From: Samuel Holland To: =?UTF-8?q?Heiko=20St=C3=BCbner?= , Sandy Huang , dri-devel@lists.freedesktop.org Cc: linux-rockchip@lists.infradead.org, Alistair Francis , =?UTF-8?q?Ond=C5=99ej=20Jirman?= , Andreas Kemnade , Daniel Vetter , David Airlie , Geert Uytterhoeven , Samuel Holland , Krzysztof Kozlowski , Liang Chen , Maarten Lankhorst , Maxime Ripard , Michael Riesch , Nicolas Frattaroli , Peter Geis , Rob Herring , Sam Ravnborg , Thierry Reding , Thomas Zimmermann , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH 08/16] drm/rockchip: ebc: Add LUT loading Date: Wed, 13 Apr 2022 17:19:08 -0500 Message-Id: <20220413221916.50995-9-samuel@sholland.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220413221916.50995-1-samuel@sholland.org> References: <20220413221916.50995-1-samuel@sholland.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_PASS, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The EBC contains a 16 KiB SRAM which stores the current LUT. It needs to be programmed any time the LUT changes or the hardware block is enabled. Since both of these triggers can happen at the same time, use a flag to avoid writing the LUT twice. Signed-off-by: Samuel Holland --- drivers/gpu/drm/rockchip/Kconfig | 3 +- drivers/gpu/drm/rockchip/rockchip_ebc.c | 76 +++++++++++++++++++++++++ 2 files changed, 78 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/rockchip/Kconfig b/drivers/gpu/drm/rockchip/Kconfig index 9d3273a5fd97..efe4476e336d 100644 --- a/drivers/gpu/drm/rockchip/Kconfig +++ b/drivers/gpu/drm/rockchip/Kconfig @@ -94,7 +94,8 @@ endif config DRM_ROCKCHIP_EBC tristate "DRM Support for Rockchip EBC" - depends on DRM + depends on DRM && IIO + select DRM_EPD_HELPER select DRM_GEM_SHMEM_HELPER select DRM_KMS_HELPER help diff --git a/drivers/gpu/drm/rockchip/rockchip_ebc.c b/drivers/gpu/drm/rockchip/rockchip_ebc.c index 095d66e67c2f..ca3173b28d1c 100644 --- a/drivers/gpu/drm/rockchip/rockchip_ebc.c +++ b/drivers/gpu/drm/rockchip/rockchip_ebc.c @@ -5,6 +5,7 @@ #include #include +#include #include #include #include @@ -122,6 +123,7 @@ #define EBC_WIN_MST2 0x0058 #define EBC_LUT_DATA 0x1000 +#define EBC_MAX_PHASES 256 #define EBC_NUM_LUT_REGS 0x1000 #define EBC_NUM_SUPPLIES 3 @@ -134,11 +136,15 @@ struct rockchip_ebc { struct drm_crtc crtc; struct drm_device drm; struct drm_encoder encoder; + struct drm_epd_lut lut; + struct drm_epd_lut_file lut_file; struct drm_plane plane; + struct iio_channel *temperature_channel; struct regmap *regmap; struct regulator_bulk_data supplies[EBC_NUM_SUPPLIES]; struct task_struct *refresh_thread; u32 dsp_start; + bool lut_changed; bool reset_complete; }; @@ -282,10 +288,59 @@ static void rockchip_ebc_refresh(struct rockchip_ebc *ebc, bool global_refresh, enum drm_epd_waveform waveform) { + struct drm_device *drm = &ebc->drm; + struct device *dev = drm->dev; + int ret, temperature; + + /* Resume asynchronously while preparing to refresh. */ + ret = pm_runtime_get(dev); + if (ret < 0) { + drm_err(drm, "Failed to request resume: %d\n", ret); + return; + } + + ret = iio_read_channel_processed(ebc->temperature_channel, &temperature); + if (ret < 0) { + drm_err(drm, "Failed to get temperature: %d\n", ret); + } else { + /* Convert from millicelsius to celsius. */ + temperature /= 1000; + + ret = drm_epd_lut_set_temperature(&ebc->lut, temperature); + if (ret < 0) + drm_err(drm, "Failed to set LUT temperature: %d\n", ret); + else if (ret) + ebc->lut_changed = true; + } + + ret = drm_epd_lut_set_waveform(&ebc->lut, waveform); + if (ret < 0) + drm_err(drm, "Failed to set LUT waveform: %d\n", ret); + else if (ret) + ebc->lut_changed = true; + + /* Wait for the resume to complete before writing any registers. */ + ret = pm_runtime_resume(dev); + if (ret < 0) { + drm_err(drm, "Failed to resume: %d\n", ret); + pm_runtime_put(dev); + return; + } + + /* This flag may have been set above, or by the runtime PM callback. */ + if (ebc->lut_changed) { + ebc->lut_changed = false; + regmap_bulk_write(ebc->regmap, EBC_LUT_DATA, + ebc->lut.buf, EBC_NUM_LUT_REGS); + } + if (global_refresh) rockchip_ebc_global_refresh(ebc, ctx); else rockchip_ebc_partial_refresh(ebc, ctx); + + pm_runtime_mark_last_busy(dev); + pm_runtime_put_autosuspend(dev); } static int rockchip_ebc_refresh_thread(void *data) @@ -708,6 +763,15 @@ static int rockchip_ebc_drm_init(struct rockchip_ebc *ebc) struct drm_bridge *bridge; int ret; + ret = drmm_epd_lut_file_init(drm, &ebc->lut_file, "rockchip/ebc.wbf"); + if (ret) + return ret; + + ret = drmm_epd_lut_init(&ebc->lut_file, &ebc->lut, + DRM_EPD_LUT_4BIT_PACKED, EBC_MAX_PHASES); + if (ret) + return ret; + ret = drmm_mode_config_init(drm); if (ret) return ret; @@ -810,6 +874,13 @@ static int rockchip_ebc_runtime_resume(struct device *dev) if (ret) goto err_disable_hclk; + /* + * Do not restore the LUT registers here, because the temperature or + * waveform may have changed since the last refresh. Instead, have the + * refresh thread program the LUT during the next refresh. + */ + ebc->lut_changed = true; + regcache_cache_only(ebc->regmap, false); regcache_mark_dirty(ebc->regmap); regcache_sync(ebc->regmap); @@ -919,6 +990,11 @@ static int rockchip_ebc_probe(struct platform_device *pdev) return dev_err_probe(dev, PTR_ERR(ebc->hclk), "Failed to get hclk\n"); + ebc->temperature_channel = devm_iio_channel_get(dev, NULL); + if (IS_ERR(ebc->temperature_channel)) + return dev_err_probe(dev, PTR_ERR(ebc->temperature_channel), + "Failed to get temperature I/O channel\n"); + for (i = 0; i < EBC_NUM_SUPPLIES; i++) ebc->supplies[i].supply = rockchip_ebc_supplies[i]; -- 2.35.1