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[209.85.128.176]) by smtp.gmail.com with ESMTPSA id 64-20020a370743000000b0069a0cb6e4d5sm849676qkh.81.2022.04.14.04.48.34 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 14 Apr 2022 04:48:34 -0700 (PDT) Received: by mail-yw1-f176.google.com with SMTP id 00721157ae682-2ebebe631ccso52425077b3.4; Thu, 14 Apr 2022 04:48:34 -0700 (PDT) X-Received: by 2002:a81:413:0:b0:2ec:31d7:7e60 with SMTP id 19-20020a810413000000b002ec31d77e60mr1650211ywe.62.1649936914141; Thu, 14 Apr 2022 04:48:34 -0700 (PDT) MIME-Version: 1.0 References: <20220414074011.500533-1-herve.codina@bootlin.com> <20220414074011.500533-2-herve.codina@bootlin.com> <20220414132534.35467781@bootlin.com> In-Reply-To: <20220414132534.35467781@bootlin.com> From: Geert Uytterhoeven Date: Thu, 14 Apr 2022 13:48:22 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 1/8] PCI: rcar-gen2: Add support for clocks To: Herve Codina Cc: Marek Vasut , Yoshihiro Shimoda , Bjorn Helgaas , Rob Herring , Krzysztof Kozlowski , Geert Uytterhoeven , Magnus Damm , Lorenzo Pieralisi , =?UTF-8?Q?Krzysztof_Wilczy=C5=84ski?= , Rob Herring , linux-pci , Linux-Renesas , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Linux Kernel Mailing List , Sergey Shtylyov , Thomas Petazzoni , Clement Leger , Miquel Raynal Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8BIT X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,RDNS_NONE, SPF_HELO_NONE,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Hervé, On Thu, Apr 14, 2022 at 1:29 PM Herve Codina wrote: > On Thu, 14 Apr 2022 10:45:54 +0200 > Geert Uytterhoeven wrote: > > On Thu, Apr 14, 2022 at 9:40 AM Herve Codina wrote: > > > The PCI rcar-gen2 does not call any clk_prepare_enable(). > > > > Correct, this driver manages the clocks indirectly through Runtime PM. > > > > > This lead to an access failure when the driver tries to access > > > the IP (at least on a RZ/N1D platform). > > > > I expect adding > > > > power-domans = <&sysctrl>; > > > > to the pci_usb node makes this patch redundant. > > Seems not enough. > I tried what you suggest : > - Added 'power-domains = <&systrl>;' to the pci_usb node > - Added missing '#power-domain-cells = <0>;' to sysctrl node > - Reverted my patch. > > The system crashed at boot: > [ 0.832958] Unhandled fault: external abort on non-linefetch (0x1008) at 0x90b5f848 That's indeed a typical symptom of accessing a module's registers while the module's clock is disabled. > I also added a trace printk in r9a06g032-clocks.c and > r9a06g032_attach_dev() was never called. > > Did I miss to set something ? Do you have CONFIG_PM and CONFIG_PM_GENERIC_DOMAINS enabled? Apparently ARCH_RZN1 does not select these options yet. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds