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[2620:137:e000::1:18]) by mx.google.com with ESMTPS id s3-20020a056a00178300b004fa3a8e007fsi3091277pfg.310.2022.04.15.17.39.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Apr 2022 17:39:19 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) client-ip=2620:137:e000::1:18; Authentication-Results: mx.google.com; dkim=pass header.i=@alien8.de header.s=dkim header.b=DNT12Fxs; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=alien8.de Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 5EAF6F1AE5; Fri, 15 Apr 2022 17:34:10 -0700 (PDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241581AbiDNJOB (ORCPT + 99 others); Thu, 14 Apr 2022 05:14:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51954 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241773AbiDNJNf (ORCPT ); Thu, 14 Apr 2022 05:13:35 -0400 Received: from mail.skyhub.de (mail.skyhub.de [IPv6:2a01:4f8:190:11c2::b:1457]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 04F054664B; Thu, 14 Apr 2022 02:11:07 -0700 (PDT) Received: from zn.tnic (p2e55d808.dip0.t-ipconnect.de [46.85.216.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.skyhub.de (SuperMail on ZX Spectrum 128k) with ESMTPSA id 612781EC05DE; Thu, 14 Apr 2022 11:11:01 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alien8.de; s=dkim; t=1649927461; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:in-reply-to:in-reply-to: references:references; bh=MTWF2aCmdBq52GRNGDvzlxxUlrpYNeatGNZz2SMPX80=; b=DNT12Fxsa+u2m0hR6MGCN+S65o16yu8pNWTXfFy/CSOFTjntgmvV9FmXEvC8ein49u2XCQ xDQSfyoNtj/TXcAzBDM1qaFHvMTr3tX9rtOFx/TFonxyQlpSlaj5bFXW/aW4IUlLJQBqEF ZBlr4OE/98v9sWV/JSdK0wgJoWBfa9k= Date: Thu, 14 Apr 2022 11:11:01 +0200 From: Borislav Petkov To: Yazen Ghannam Cc: "Luck, Tony" , Smita Koralahalli , linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org, x86@kernel.org, hpa@zytor.com, Dave Hansen Subject: Re: [PATCH v5 2/2] x86/mce: Add support for Extended Physical Address MCA changes Message-ID: References: <20220412154038.261750-1-Smita.KoralahalliChannabasappa@amd.com> <20220412154038.261750-3-Smita.KoralahalliChannabasappa@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,RDNS_NONE,SPF_HELO_NONE,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Apr 13, 2022 at 07:40:39PM +0000, Yazen Ghannam wrote: > I think the init logic breaks here. MCE now gets enabled before clearing old > errors. So it's possible that the old errors get overwritten by new ones. Err, I don't understand. CR4.MCE bit description has: "Regardless of whether machine-check exceptions are enabled, the processor records enabled-errors when they occur." I'm guessing enabled errors are those for which the respective bits in the MCi_CTL banks are set. And I think the CPU comes out of reset with those bits set. So the overwriting will happen regardless. The only difference here is that "[s]etting MCE to 1 enables the machine-check exception mechanism." So you'll get a #MC raised vs shutdown on a fatal error. Or am I missing an angle? > > @@ -1791,6 +1761,9 @@ static void __mcheck_cpu_check_banks(void) > > if (!b->init) > > continue; > > > > + wrmsrl(mca_msr_reg(i, MCA_CTL), b->ctl); > > + wrmsrl(mca_msr_reg(i, MCA_STATUS), 0); > > Same idea here. STATUS should be cleared before turning on reporting in a bank > using MCA_CTL. Look at the current code. Called in this order: __mcheck_cpu_init_clear_banks: wrmsrl(mca_msr_reg(i, MCA_CTL), b->ctl); wrmsrl(mca_msr_reg(i, MCA_STATUS), 0); __mcheck_cpu_check_banks rdmsrl(mca_msr_reg(i, MCA_CTL), msrval); b->init = !!msrval; STATUS *is* cleared after MCA_CTL now too. If this ordering is wrong - and it sounds like it is - then this needs to be a separate patch and Cc: and needs to go in now. > One downside though is that the system goes longer with CR4.MCE cleared. So > there's greater risk of encountering a shutdown due to a machine check error. Yeah, I don't think the couple of msecs matter. Thx. -- Regards/Gruss, Boris. https://people.kernel.org/tglx/notes-about-netiquette