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Fri, 15 Apr 2022 13:02:48 -0400 X-MC-Unique: 7v658Eh0O260N3sQjcrLhg-1 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.rdu2.redhat.com [10.11.54.4]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 2E2723C18535; Fri, 15 Apr 2022 17:02:47 +0000 (UTC) Received: from [10.22.32.72] (unknown [10.22.32.72]) by smtp.corp.redhat.com (Postfix) with ESMTP id 95928202F320; Fri, 15 Apr 2022 17:02:42 +0000 (UTC) Message-ID: <8f2a3903-ab49-23cc-a362-a9857dc38410@redhat.com> Date: Fri, 15 Apr 2022 13:02:42 -0400 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.5.0 Subject: Re: [PATCH v3 1/7] asm-generic: ticket-lock: New generic ticket-based spinlock Content-Language: en-US To: Palmer Dabbelt Cc: Arnd Bergmann , heiko@sntech.de, guoren@kernel.org, shorne@gmail.com, peterz@infradead.org, mingo@redhat.com, Will Deacon , boqun.feng@gmail.com, jonas@southpole.se, stefan.kristiansson@saunalahti.fi, Paul Walmsley , aou@eecs.berkeley.edu, macro@orcam.me.uk, Greg KH , sudipm.mukherjee@gmail.com, wangkefeng.wang@huawei.com, jszhang@kernel.org, linux-csky@vger.kernel.org, linux-kernel@vger.kernel.org, openrisc@lists.librecores.org, linux-riscv@lists.infradead.org, linux-arch@vger.kernel.org References: From: Waiman Long In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Scanned-By: MIMEDefang 2.78 on 10.11.54.4 X-Spam-Status: No, score=-5.8 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,NICE_REPLY_A,RDNS_NONE,SPF_HELO_NONE, T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 4/15/22 12:46, Palmer Dabbelt wrote: > >>> diff --git a/include/asm-generic/spinlock_types.h >>> b/include/asm-generic/spinlock_types.h >>> new file mode 100644 >>> index 000000000000..e56ddb84d030 >>> --- /dev/null >>> +++ b/include/asm-generic/spinlock_types.h >>> @@ -0,0 +1,17 @@ >>> +/* SPDX-License-Identifier: GPL-2.0 */ >>> + >>> +#ifndef __ASM_GENERIC_TICKET_LOCK_TYPES_H >>> +#define __ASM_GENERIC_TICKET_LOCK_TYPES_H >>> + >>> +#include >>> +typedef atomic_t arch_spinlock_t; >>> + >>> +/* >>> + * qrwlock_types depends on arch_spinlock_t, so we must typedef >>> that before the >>> + * include. >>> + */ >>> +#include >> >> I believe that if you guard the include line by >> >> #ifdef CONFIG_QUEUED_RWLOCK >> #include >> #endif >> >> You may not need to do the hack in patch 5. > > Yes, and we actually had it that way the first time around > (specifically the ARCH_USES_QUEUED_RWLOCKS, but IIUC that's the same > here).  The goal was to avoid adding the ifdef to the asm-generic code > and instead keep the oddness in arch/riscv, it's only there for that > one commit (and just so we can split out the spinlock conversion from > the rwlock conversion, in case there's a bug and these need to be > bisected later). > > I'd also considered renaming qrwlock* to rwlock*, which would avoid > the ifdef and make it a touch easier to override the rwlock > implementation, but that didn't seem useful enough to warrant the > diff.  These all seem a bit more coupled than I expected them to be > (both {spin,qrw}lock{,_types}.h and the bits in linux/), I looked into > cleaning that up a bit but it seemed like too much for just the one > patch set. Then you are forcing arches that use asm_generic/spinlock.h to use qrwlock as well. Even though most of them probably will, but forcing it this way remove the flexibility an arch may want to have. The difference between CONFIG_QUEUED_RWLOCK and ARCH_USES_QUEUED_RWLOCKS is that qrwlock will not be compiled in when PREEMPT_RT || !SMP. So CONFIG_QUEUED_RWLOCK is a more accurate guard as to whether qrwlock should really be used. Cheers, Longman