Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) client-ip=2620:137:e000::1:18;
From:   Liu Ying <victor.liu@nxp.com>
To:     linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
        linux-arm-kernel@lists.infradead.org
Cc:     kishon@ti.com, vkoul@kernel.org, robh+dt@kernel.org,
        krzk+dt@kernel.org, andrzej.hajda@intel.com,
        narmstrong@baylibre.com, robert.foss@linaro.org,
        Laurent.pinchart@ideasonboard.com, jonas@kwiboo.se,
        jernej.skrabec@gmail.com, airlied@linux.ie, daniel@ffwll.ch,
        shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de,
        festevam@gmail.com, linux-imx@nxp.com, agx@sigxcpu.org,
        robert.chiras@nxp.com, martin.kepplinger@puri.sm,
        Rob Herring <robh@kernel.org>
Subject: [PATCH v8 4/5] dt-bindings: phy: mixel: mipi-dsi-phy: Add Mixel combo PHY support for i.MX8qxp
Date:   Thu, 14 Apr 2022 15:10:38 +0800
Message-Id: <20220414071039.423271-5-victor.liu@nxp.com>
In-Reply-To: <20220414071039.423271-1-victor.liu@nxp.com>
References: <20220414071039.423271-1-victor.liu@nxp.com>
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
MIME-Version: 1.0
X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1
X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?bEJicG5JVkZhMlA3T2V2dnd6YjBLNC9CWTFNQTAwa2EzaEhJM0thdStCSGpu?=
 =?utf-8?B?WW1ZSWt1WjBlQThiQ203d1N1Wi83alovWk11cDFZNFVOUnB2VlM2c2FBZFgv?=
 =?utf-8?B?d1FGb3dYekEzd1BGM05LQ3FSbFBuTEhWU0x4THdVTUc5d1ltWFN5cXBFUCt3?=
 =?utf-8?B?cDlwZzJwbXZsUUpkb2pZRjM0cTBxckFnbVA5bFVkVEdNK1JtVWY4NkhnWGVH?=
 =?utf-8?B?aUJpd05oaTFNdVg4ZVQyem5YMUx4TmtmRTVsT3hpdFdZdlFraVJzaXFCdStD?=
 =?utf-8?B?bXNtVUZXNXZNaXRnbTJ2Vy9KSWtsaXpvRExyMFY1SjBma0pVQUQ4N1BlUUxM?=
 =?utf-8?B?WEczZzRsejJJRlVxMWRMUmhjZ3Z6d3pVREZkbmZOZXpZazA0VHRCUzVCSi85?=
 =?utf-8?B?QlFNbUJ2Tjh6SHJaWVdFWVNQeVEyL25JMkUyblAxZm1ValY1OGUrNzR5WllV?=
 =?utf-8?B?RWg5QXpXbTh1alhZWWJjdFMzQ01lMWJhRDQzK1ZwSEtoRHJ0Z3ZlTmdxVS9h?=
 =?utf-8?B?RlZvNzRRaFE5dDRlemVlUVNzRkFsUS9NUkRCdVRjUk1qSzNJRXlUZ1BhbkhQ?=
 =?utf-8?B?QXp1SzIrSVZjang0QWJmYWxFZSthcXJsMGZ6VHIyTVE0OGwwanV5L2UvUTNW?=
 =?utf-8?B?bXR1YVl3VXkzYmUvZ2wxWDMzZWhZSFo0Z0FYakhMQXJINDVuMU9SWC9sa3Rp?=
 =?utf-8?B?OTM5WEU3ZGdLOGlUQ1BvQ2QwckdkWnFPdW56bUdsM2VKQmZOMXQ5TFZrd1A1?=
 =?utf-8?B?Z2c1TlVXU0NLUEdBWFo3YzY3dkNCRWIxNnRNUnBqT0ZJdGgyQU53VDFiQ2M4?=
 =?utf-8?B?N3dmaVQxUnJPaEo5QWR1bmRsQ3Z6Sk1mS2hyODZzT0lsTlZ3TUJqaDYvbmlQ?=
 =?utf-8?B?WUp3Q0N0cmlIdlZrVWZXaFFzaDM0ZlgvYWo2dGNhRmJSUjdzOEp2VUpneTJD?=
 =?utf-8?B?N3hhZ2trSDgxUlM2ZGk2dDRzcmJ2L0g5dE5VcG1jMUJRUTBkQzZpOWRGVDhN?=
 =?utf-8?B?T1pFVmtyVTRDb2pyNlpoV1NBL3hFNXZlc1Z0TXZJTFVBaXlxUnRMcFUrd3Ur?=
 =?utf-8?B?U0VuNFhjYnR3NldGcVNCaCtZUmNvQVdSdWdxR1J4Rmxtc0VmQ2pqZHZVWFF4?=
 =?utf-8?B?Q05na1B6Mksxc25oeFNRK0tjdm1SZkx6N3ZqV1Zka1FsMEJvZHQvTEtYTGRU?=
 =?utf-8?B?WG9lM0dJYXdyVXgzMm1aZzdXbU51cUo5d0JRSjl2MzVtcDNNR0Vrbm9reGNi?=
 =?utf-8?B?bHlOdW5sYVVrb0NIRndxU0UxSzY2bEtqNWFUd2VmY1ZTTHUzQzhmRS8yNXM4?=
 =?utf-8?B?TExMM29iRVdYbW1NMDhUU2RMYmJuaENlaDVnM0M4aldIZ3JJbHcwaVdXajFE?=
 =?utf-8?B?MzgweTBRbjJ6UFVmY2krd3JkaWJSSklwd1ZUdUVYclAzbGJJNFNtQzhEaWxU?=
 =?utf-8?B?dU03N2ZuM0pCRElZdjg5LzhsWlg3TFdJWW41bkUzUk9GTWkzT0JJUDhlbTZx?=
 =?utf-8?B?bC96aTMrWjhMa2UwZzVlL05jU0MrNkZhODhSdkhCNmpsUWV4RVBac3Y2d2NJ?=
 =?utf-8?B?ZXdkZkczb0orRThSczRUQjRWTXlGWlU3cTZ2RDlxMXF3dFN4a1VaMW04ajBU?=
 =?utf-8?B?bFJqZXplSnRuZVh2L2NxYlYwSklUTEJjTnlQcFJmMUIrVmtMLzhlaCtleE9m?=
 =?utf-8?B?MWRlSm5CbllFREV4akh6b0pmb0JWSVhKS1ZBbHFUU09ETVVZeFJnbGlZbWlU?=
 =?utf-8?B?UXBqWWY2TFhxdEpheU9sUmE5aHhPWDRKOGxSRHZmZTRHb1JyZ0NBNFl1ejkr?=
 =?utf-8?B?SkJjeE5jV05aYU4xQ2tJOHNTelVaMldyRTNCSktFbitwRkRxWGRnczNuaTdo?=
 =?utf-8?B?K1JjbjJTbllSaDZQTjFRcllwUmgwbGxjWEYxNHl4SmhUWHhqQWU2dHdvK2F2?=
 =?utf-8?B?TXpWYzRUYUp4MlZOWUFqMHVDazRzdi9pSDhMVS9kSllqMDFBc2tCWFpqbkVF?=
 =?utf-8?B?WWdTY1JRcXI1b1JhTnlDNXpzUmdwTlRlUGJ3akNITzNETjRYWFRGd28xd21W?=
 =?utf-8?B?WVBwSGxRVlFiVjNrRWlqME92QTlKaldOdXk0NnRvL29pNHZZa0JYSlo4N29w?=
 =?utf-8?B?MUtKVkRhb2lOcndiTFNWc1BlYnlZcGV2ZkFsbXAyWFM3NnRqZjFxR3o2dlov?=
 =?utf-8?B?Sm00Y2V6SXQ1UVNQemNzN3c0NEVyOWJLWUd4blNJdktXQ3BMQ1N6TDkraVlZ?=
 =?utf-8?B?OEdFSkEzMitlZmcrdXdGZkRrYlduVHlEVytjaG9mNCtrMU93SlR6U1NFRjht?=
 =?utf-8?B?cFlrSE5iMThiaXU0K2xGYXVmRkxLNmcwekpTa3dhd1NNWnREZ3lmdz09?=
X-OriginatorOrg: nxp.com
X-MS-Exchange-CrossTenant-Network-Message-Id: 193c7933-d7ec-40f1-d10b-08da1de5b4d5
X-MS-Exchange-CrossTenant-AuthSource: AM7PR04MB7046.eurprd04.prod.outlook.com
X-MS-Exchange-CrossTenant-AuthAs: Internal
X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Apr 2022 07:09:24.7630
 (UTC)
X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted
X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635
X-MS-Exchange-CrossTenant-MailboxType: HOSTED
X-MS-Exchange-CrossTenant-UserPrincipalName: 1GG83gnQLk1XZ16Y15mpwuE58I/JDK7aFjEORqkYQtH6EFObaFi5Y+ZltdUXwdV2+smxfQ+Xg1pxtczMThwZ5g==
X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM5PR04MB3027
X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIM_SIGNED,
	DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,
	MAILING_LIST_MULTI,RDNS_NONE,SPF_HELO_NONE,T_SCC_BODY_TEXT_LINE
	autolearn=no autolearn_force=no version=3.4.6
X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on
	lindbergh.monkeyblade.net
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

Add support for Mixel MIPI DPHY + LVDS PHY combo IP
as found on Freescale i.MX8qxp SoC.

Cc: Guido Günther <agx@sigxcpu.org>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Vinod Koul <vkoul@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: NXP Linux Team <linux-imx@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
---
v7->v8:
* No change.

v6->v7:
* No change.

v5->v6:
* No change.

v4->v5:
* No change.

v3->v4:
* Add Rob's and Guido's R-b tags.

v2->v3:
* No change.

v1->v2:
* Add the binding for i.MX8qxp Mixel combo PHY based on the converted binding.
  (Guido)

 .../bindings/phy/mixel,mipi-dsi-phy.yaml      | 41 +++++++++++++++++--
 1 file changed, 38 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.yaml b/Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.yaml
index c34f2e6d6bd5..786cfd71cb7e 100644
--- a/Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.yaml
@@ -14,10 +14,14 @@ description: |
   MIPI-DSI IP from Northwest Logic). It represents the physical layer for the
   electrical signals for DSI.
 
+  The Mixel PHY IP block found on i.MX8qxp is a combo PHY that can work
+  in either MIPI-DSI PHY mode or LVDS PHY mode.
+
 properties:
   compatible:
     enum:
       - fsl,imx8mq-mipi-dphy
+      - fsl,imx8qxp-mipi-dphy
 
   reg:
     maxItems: 1
@@ -40,6 +44,11 @@ properties:
   "#phy-cells":
     const: 0
 
+  fsl,syscon:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description: |
+      A phandle which points to Control and Status Registers(CSR) module.
+
   power-domains:
     maxItems: 1
 
@@ -48,12 +57,38 @@ required:
   - reg
   - clocks
   - clock-names
-  - assigned-clocks
-  - assigned-clock-parents
-  - assigned-clock-rates
   - "#phy-cells"
   - power-domains
 
+allOf:
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: fsl,imx8mq-mipi-dphy
+    then:
+      properties:
+        fsl,syscon: false
+
+      required:
+        - assigned-clocks
+        - assigned-clock-parents
+        - assigned-clock-rates
+
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: fsl,imx8qxp-mipi-dphy
+    then:
+      properties:
+        assigned-clocks: false
+        assigned-clock-parents: false
+        assigned-clock-rates: false
+
+      required:
+        - fsl,syscon
+
 additionalProperties: false
 
 examples:
-- 
2.25.1