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[2620:137:e000::1:20]) by mx.google.com with ESMTP id i18-20020aa78d92000000b0050567a4daa9si7703363pfr.161.2022.04.17.23.18.42; Sun, 17 Apr 2022 23:18:58 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@mailerdienst.de header.s=20200217 header.b=td7K6Qu3; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232163AbiDPN6P (ORCPT + 99 others); Sat, 16 Apr 2022 09:58:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59690 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232153AbiDPN6H (ORCPT ); Sat, 16 Apr 2022 09:58:07 -0400 Received: from mxout2.routing.net (mxout2.routing.net [IPv6:2a03:2900:1:a::b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6D22B36683; Sat, 16 Apr 2022 06:55:34 -0700 (PDT) Received: from mxbox2.masterlogin.de (unknown [192.168.10.89]) by mxout2.routing.net (Postfix) with ESMTP id 536B65FB56; Sat, 16 Apr 2022 13:55:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailerdienst.de; s=20200217; t=1650117331; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=c7cLwYkQx+UgcFCUSlE8PMzw+TTvuN7Xap07GmrtOwQ=; b=td7K6Qu3lBEpcA31PRIpEJ/SDJbnn+2Fr8UO1kYI18UixmbBzbbi1z8+tliEaQbVoVY0EE UA2BrAqn+8fORt9+Iv3kW5i+qz+yC1SCrjSvTxi4qRTxkRVqgmCV1nRIhFkwtilG7dQ9U5 DKCijIQ5eFeOEgrefYx1siXQgYwy0/k= Received: from localhost.localdomain (fttx-pool-217.61.150.108.bambit.de [217.61.150.108]) by mxbox2.masterlogin.de (Postfix) with ESMTPSA id CA4D51005BA; Sat, 16 Apr 2022 13:55:29 +0000 (UTC) From: Frank Wunderlich To: linux-rockchip@lists.infradead.org Cc: Frank Wunderlich , Kishon Vijay Abraham I , Vinod Koul , Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Bjorn Helgaas , Philipp Zabel , Johan Jonker , Peter Geis , Michael Riesch , linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org Subject: [RFC/RFT 0/6] RK3568 PCIe V3 support Date: Sat, 16 Apr 2022 15:54:52 +0200 Message-Id: <20220416135458.104048-1-linux@fw-web.de> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Mail-ID: b85ff0f6-efa2-44a0-8e44-ec2828455f06 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Frank Wunderlich This series adds Rockchip PCIe V3 support found on rk3568 SOC. It is based on "Enable rk356x PCIe controller" series of Peter Geis v7: https://patchwork.kernel.org/project/linux-rockchip/cover/20220416110507.642398-1-pgwipeout@gmail.com/ Compared to PCIeV2 which uses the Naneng combphy, pciev3 uses a dedicated pci-phy. Frank Wunderlich (6): dt-bindings: phy: rockchip: add pcie3 phy dt-bindings: soc: grf: add pcie30-{phy,pipe}-grf phy: rockchip: Support pcie v3 PCI: rockchip-dwc: add pcie bifurcation arm64: dts: rockchip: rk3568: Add PCIe v3 nodes arm64: dts: rockchip: Add PCIe v3 nodes to BPI-R2-Pro .../bindings/phy/rockchip-pcie3-phy.yaml | 77 +++++ .../devicetree/bindings/soc/rockchip/grf.yaml | 2 + .../boot/dts/rockchip/rk3568-bpi-r2-pro.dts | 79 +++++ arch/arm64/boot/dts/rockchip/rk3568.dtsi | 122 ++++++++ drivers/pci/controller/dwc/pcie-dw-rockchip.c | 11 + drivers/phy/rockchip/Kconfig | 9 + drivers/phy/rockchip/Makefile | 1 + .../phy/rockchip/phy-rockchip-snps-pcie3.c | 278 ++++++++++++++++++ include/dt-bindings/phy/phy-snps-pcie3.h | 21 ++ include/linux/phy/pcie.h | 12 + 10 files changed, 612 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/rockchip-pcie3-phy.yaml create mode 100644 drivers/phy/rockchip/phy-rockchip-snps-pcie3.c create mode 100644 include/dt-bindings/phy/phy-snps-pcie3.h create mode 100644 include/linux/phy/pcie.h -- 2.25.1