Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
Message-ID: <3e6713ef-5109-25b7-1359-7229fce368dd@nvidia.com>
Date:   Tue, 19 Apr 2022 13:13:46 -0400
User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101
 Thunderbird/91.7.0
Subject: Re: [PATCH V2 0/3] riscv: atomic: Optimize AMO instructions usage
Content-Language: en-US
To:     Andrea Parri <parri.andrea@gmail.com>, Guo Ren <guoren@kernel.org>
Cc:     Boqun Feng <boqun.feng@gmail.com>,
        "Paul E. McKenney" <paulmck@linux.vnet.ibm.com>,
        Arnd Bergmann <arnd@arndb.de>,
        Palmer Dabbelt <palmer@dabbelt.com>,
        Mark Rutland <mark.rutland@arm.com>,
        Will Deacon <will@kernel.org>,
        Peter Zijlstra <peterz@infradead.org>,
        linux-arch <linux-arch@vger.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
        linux-riscv <linux-riscv@lists.infradead.org>,
        Guo Ren <guoren@linux.alibaba.com>
References: <20220412034957.1481088-1-guoren@kernel.org>
 <YlbwOG46mCR8Q5tJ@tardis>
 <CAJF2gTRws6RqKmJHBdKsycWSkFgYna_MocJ+qp3Z9r1v7mQzsg@mail.gmail.com>
 <20220418234137.GA444607@anparri>
From:   Dan Lustig <dlustig@nvidia.com>
In-Reply-To: <20220418234137.GA444607@anparri>
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
MIME-Version: 1.0
X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1
X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?N0pGM0h4U1ZtYjZGWC9SeTZlUnh5MG5zZ1hyRnVKM0l5ZnRRWlpaQWR5VTFk?=
 =?utf-8?B?bnhwWWdUbW80YWNrUlV6MG55bkFZaTN2c3JZYVVLV2NaeEdwQzQwczRGNkZT?=
 =?utf-8?B?bGpJbkVDcmRMemlrZ0dBcHgzeHM3by9KdTFGcWRaNEdtTGRpQTFNaXFONmI5?=
 =?utf-8?B?bnE4Z2VKRm1WNmlVK01naU85eXU1cnE4dUUzam9mcHBCRHNGdGdIcFRaK2dF?=
 =?utf-8?B?RHI0MlQyRXRiNy90UEU5WFh6RHovNVU1ai8xTjc0NEZoSHBMazRwc29BdVMr?=
 =?utf-8?B?ZWZJVzdpdEJhQW9mY1VBNW9HcVQzMWxvNlM2S0RTNFJWdW9hVlRVeXhvSUdC?=
 =?utf-8?B?emVJdHFxdHd0ams0aSt4MWJTL2F3MVREQllaWnBCMEErbklkL1c0UHhjQ3Bk?=
 =?utf-8?B?UVBoRHBKSTQyNDE5RE5FOGc1VXhqd3BSSkN6TTFzR25IYlEzclVCU2NCbkE4?=
 =?utf-8?B?bVNvWFp1dWlNWGdWVUlqOFZwdXFCa0VDNWNzR0FoZzJuOUJETytGM3l2Z0tG?=
 =?utf-8?B?VXBnSTdjYnQ4ZE1nN3pRTHkwd3FJZTd6RTQ3Rng2U2ZzaENGWE52U3BVaXVK?=
 =?utf-8?B?YkVCTEFVYlJkVXN3R2dMV2U3dFJlelBkaHpFRHYrYjdzZ0FobjJrbVpCcnk1?=
 =?utf-8?B?U0JqVXRzVThmVml5amx3b2pQalBqTlMrN3ZsbWJubm5TT2RydHBrRU14N0xp?=
 =?utf-8?B?aHQ1cElJaktLZ0pRZnJtbXhkWGJhTnNvUXJQdG5rSUN6V0QvRTMvU3F6REQ1?=
 =?utf-8?B?SEVsZjJEeVRBMFlhN2ZrSS82dndKTnBUaEkxWDd3NnRIdzVYNklsaVY3SFNp?=
 =?utf-8?B?R0lCSDFLMWZvc1FzR2gxUCtGNnFnS3R3ckJBK2h3N1Q4Y05NWnhpeXgxakVz?=
 =?utf-8?B?SnIxTW9MMXpaRklDY0k3L1V0RFhhR0I5MnpzNHhhUjFSZW5qWmJQV3RzQ3RJ?=
 =?utf-8?B?T2ozSDhhMG5wbTlXZXUzdHBLUXlKd2NHcDVCWDV6SzhtR0JvUDlGSmFzUnV6?=
 =?utf-8?B?VzJlWVdqUkl4Rm9OMmVVSXh6djJLZ0ZpNmtJdE5vbjRGY3NxY1NCTXFXdjkv?=
 =?utf-8?B?ZHdZaDJ2ekU3ZFRRRUJIb1JzU2ZPZ1dScy9ITFNrNEZkc0tDNWc3SEhCVlRE?=
 =?utf-8?B?ZzBtdHo3N0IxVGpESTY3VG4wL3VYSndZcGprRU85OVptQkw1SzFwY1F0R2x6?=
 =?utf-8?B?bk1idWUwSitQWWw3ZnBuakpnekhUckJWT0xDMm5tMUNQRTROVXdMT0ZFczRo?=
 =?utf-8?B?MlZ0cUNuVXc4akhQd3V1TWFyVGhHY0VYd2U3V05tQkNYSkFsVzYySi84ODgy?=
 =?utf-8?B?cjdlWjhkR1RiWEpSdVlCMDNFT0FYRTFsd0MwbGJjMWpZM3dFWTVpWFR1cjY1?=
 =?utf-8?B?WUpyU2s4VGdEcFJyZVJHQ2Zwcm1pbWRhSm5YSFU0NGFxSGovS0tseWV3L0tS?=
 =?utf-8?B?azJTSlVEbkVRYXpVcTdvTjhOaFlkWGFVV0YxcHRTRW9IRE5QRDZ5ckdrN3BY?=
 =?utf-8?B?REdnQWcwQ1ZDWGt6K2QzdGxQMWExWlNacDU3d1kvU1czRHVObU1WNllKOUEv?=
 =?utf-8?B?OUdOUFpGZGF3RDJ2TUpBSlZkN0hla3VLNHQ3V2FvdWx3eDR5eUdVQ1FjcEdm?=
 =?utf-8?B?RXpSblB4TkFCaE1JSFdXQnBrelZqZmRqTXFkOWJkbHh4OGkvUEVqUXUvNm5i?=
 =?utf-8?B?aER6aGVkcFJKWGgvOVJpSndCMzkxaVkySXBtK2hHOHdWMzl3aXZSSm1YaWp2?=
 =?utf-8?B?U1NrekRyRjVKR2JWVC96RWV2dWpyS0F6ZUpLeURUSUs2M3o5TUNXYTZMYnlW?=
 =?utf-8?B?ZXhZc3p5VERlN2JnRlBveDdETnFxU2FMckQ5TlpjU00vS1UvZkNubFhFMUE3?=
 =?utf-8?B?aHBCUVlsZTl5OEJUbkRxSU8vS0lYbkwvemtpcENYZmIwNVlHRW1Ba2c4WmdG?=
 =?utf-8?B?MXhKVDF6NzZYRk56UlREdmorWHFGOFltL05IY2JjUjlkS2FKYnY3NEw3Y08z?=
 =?utf-8?B?UGcrL0ZrMDgrWGlvaVBmNnJPL3FRZmhVa09aRGkvbzRXNFRWYmpYcWdYc2hP?=
 =?utf-8?B?QjdzTWdvaC9sUVVzV015ZlY5TTM2MlZ1dUZibGlURW1heWFnV1hjVDBxQThY?=
 =?utf-8?B?ZHZkOFh0L00vSjhPUFM2Nld4ZjhWa0hDRTIvZmcwMTZjTnpuaGc5Q3Y0eitV?=
 =?utf-8?B?aE5RWUlNZlJyT2RQc3RDWVJsK0pMQ1ByVzVoYU4xd3p2Q1NmakR4MzU0c1hG?=
 =?utf-8?B?WW1tTHZIYUpPbXhNZDRveCtyeWd4YS9XY0RaampKSEtaQlljcEtiaGFYTEdJ?=
 =?utf-8?B?Y0VFVnRKQm80a2F2OVVHMnlTSDFxK1J3eHFIN2M0L0s0MlVCeFJtdz09?=
X-OriginatorOrg: Nvidia.com
X-MS-Exchange-CrossTenant-Network-Message-Id: 10affc09-1dc0-4cbb-48a2-08da2227f914
X-MS-Exchange-CrossTenant-AuthSource: MN2PR12MB3437.namprd12.prod.outlook.com
X-MS-Exchange-CrossTenant-AuthAs: Internal
X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Apr 2022 17:13:50.5521
 (UTC)
X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted
X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a
X-MS-Exchange-CrossTenant-MailboxType: HOSTED
X-MS-Exchange-CrossTenant-UserPrincipalName: 68Y6mG91z1hidQ+dcESEFmi7gh9g0CyCNTOFCckQyCov9QJpwMWzdlwdKqASPpx2sxWcVsVKlj1LFkoZ7dWMwA==
X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW2PR12MB2410
X-Spam-Status: No, score=-4.9 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH,
        DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO,
        NICE_REPLY_A,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,
        SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no
        version=3.4.6
X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on
        lindbergh.monkeyblade.net
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

On 4/18/2022 7:41 PM, Andrea Parri wrote:
>>> Seems to me that you are basically reverting 5ce6c1f3535f
>>> ("riscv/atomic: Strengthen implementations with fences"). That commit
>>> fixed an memory ordering issue, could you explain why the issue no
>>> longer needs a fix?
>>
>> I'm not reverting the prior patch, just optimizing it.
>>
>> In RISC-V “A” Standard Extension for Atomic Instructions spec, it said:
> 
> With reference to the RISC-V herd specification at:
> 
>   https://github.com/riscv/riscv-isa-manual.git
> 
> the issue, better, lr-sc-aqrl-pair-vs-full-barrier seems to _no longer_
> need a fix since commit:
> 
>   03a5e722fc0f ("Updates to the memory consistency model spec")
> 
> (here a template, to double check:
> 
>   https://github.com/litmus-tests/litmus-tests-riscv/blob/master/tests/non-mixed-size/HAND/LR-SC-NOT-FENCE.litmus )
> 
> I defer to Daniel/others for a "bi-section" of the prose specification.
> ;-)

What is the question exactly?

Dan

> 
>   Andrea