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X-Microsoft-Antispam-Message-Info: Y2Rje5Gkj0JRq7fSsXy+oAop8ghaTHXKhXpSOlnUumNLhg1Li6WfZr9HkQoyPrdwLHhsvgw09s5JruDsoxZTG3n8efBiBDEmIF96kdBreOeeXRn+m3NgjZ1LKZXuI2wix3pXuNGNDAifnYdjrlaUCTjGHMIZyfIV7z6/gvYNQHOw7XK31HZDR1/9Xm/5Qek2ZjHcvPWbuVMW9Duu41VlSGYW3cW5wB9RxxrXPXWaZ/+hx32yspjgykSTz3dlI4uF4XjLlhDNof69gmAJEklGNCQLWQK3vWPjI6Nmk0Iez5BPN7dQQGj61ygkb7a+GC2n/r/Tr3TeR/nyJklBgWD0Oi/d8Vib8dYo3D3pLY5t+oeMEwS8WNXs00Rmr73bkmBK7BjphiIGGRS9nJOpm80eM+gIr61H37lAhkLsY8FSVsoy5zoI+hcjJB+EDlRfHzbfmhGzo35RlHLF5qPkVsiCq31aVJYwbsyyHakeBGTNpomvKjjmFAWy28Yhc4KC8r0myzPVOzm34VmGZrvv3nyK7jnJ22mqT+BnbEdpczytUpNbovlByQ2z/HnSXx1/u3Oz4Yb0tyE//H8hjy5OipFoX5fzkaXLcseqlR0X+saVr1Ol+uCT/JlucH+MwLcG3KYMEWtTzXJFYLs79tHFNqfBZqroks0G7rlEDgMLEJ70I0ffEcefDJnvwgmTR7yONxgeF1RBB3dtsnrExhzHTjS6X/ETHdCMCKaewwG3bCXp3Rk= X-Forefront-Antispam-Report: CIP:12.22.5.235;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:InfoNoRecords;CAT:NONE;SFS:(13230001)(4636009)(40470700004)(46966006)(36840700001)(1076003)(70586007)(47076005)(186003)(86362001)(26005)(8676002)(426003)(2906002)(70206006)(81166007)(83380400001)(36860700001)(4326008)(82310400005)(8936002)(36756003)(2616005)(336012)(5660300002)(7416002)(508600001)(356005)(7696005)(54906003)(110136005)(316002)(40460700003)(36900700001)(2101003);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Apr 2022 21:02:02.1988 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b47da6ab-d5c4-4eb4-73c4-08da2247da1f X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[12.22.5.235];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT059.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB3178 X-Spam-Status: No, score=-1.7 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE, T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The arm_smmu_mm_invalidate_range function is designed to be called by mm core for Shared Virtual Addressing purpose between IOMMU and CPU MMU. However, the ways of two subsystems defining their "end" addresses are slightly different. IOMMU defines its "end" address using the last address of an address range, while mm core defines that using the following address of an address range: include/linux/mm_types.h: unsigned long vm_end; /* The first byte after our end address ... This mismatch resulted in an incorrect calculation for size so it failed to be page-size aligned. Further, it caused a dead loop at "while (iova < end)" check in __arm_smmu_tlb_inv_range function. This patch fixes the issue by doing the calculation correctly. Fixes: 2f7e8c553e98d ("iommu/arm-smmu-v3: Hook up ATC invalidation to mm ops") Cc: stable@vger.kernel.org Signed-off-by: Nicolin Chen --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c index 22ddd05bbdcd..c623dae1e115 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c @@ -183,7 +183,14 @@ static void arm_smmu_mm_invalidate_range(struct mmu_notifier *mn, { struct arm_smmu_mmu_notifier *smmu_mn = mn_to_smmu(mn); struct arm_smmu_domain *smmu_domain = smmu_mn->domain; - size_t size = end - start + 1; + size_t size; + + /* + * The mm_types defines vm_end as the first byte after the end address, + * different from IOMMU subsystem using the last address of an address + * range. So do a simple translation here by calculating size correctly. + */ + size = end - start; if (!(smmu_domain->smmu->features & ARM_SMMU_FEAT_BTM)) arm_smmu_tlb_inv_range_asid(start, size, smmu_mn->cd->asid, -- 2.17.1