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[2620:137:e000::1:20]) by mx.google.com with ESMTP id 15-20020a056e0216cf00b002c8063b4eb4si1061477ilx.112.2022.04.20.05.10.23; Wed, 20 Apr 2022 05:10:37 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcdkim header.b="rh3+Ru/Y"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244904AbiDRPS5 (ORCPT + 99 others); Mon, 18 Apr 2022 11:18:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54282 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345396AbiDRPRj (ORCPT ); Mon, 18 Apr 2022 11:17:39 -0400 Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8442DC12CB; Mon, 18 Apr 2022 07:14:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1650291271; x=1681827271; h=from:to:cc:subject:date:message-id:mime-version; bh=d/TCJeWn01oK1kgjjeXq/8QwVs8Q8YEjJikEqXwx9CE=; b=rh3+Ru/Y4wJJ6i8jb0KIc7l91555wPO+xELQ9+OsAc8eMVWKNjy5P3vk O2J+8u+VPV8mTshnj1bNLre/QdMRFd10JO2WECBrPpllr3wdo7w+2VTWe zjXLP+vekKQU6vWwxHQdGLruPoB1pZvhzd1N07FckIaiXY5WEVcg4Iwml o=; Received: from ironmsg-lv-alpha.qualcomm.com ([10.47.202.13]) by alexa-out.qualcomm.com with ESMTP; 18 Apr 2022 07:14:31 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg-lv-alpha.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Apr 2022 07:14:30 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Mon, 18 Apr 2022 07:14:29 -0700 Received: from hu-srivasam-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Mon, 18 Apr 2022 07:14:26 -0700 From: Srinivasa Rao Mandadapu To: , , , , , , , , , , CC: Srinivasa Rao Mandadapu Subject: [PATCH v8 0/4] Add soundcard support for sc7280 based platforms. Date: Mon, 18 Apr 2022 19:44:08 +0530 Message-ID: <1650291252-30398-1-git-send-email-quic_srivasam@quicinc.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch set is to add bolero digital macros, WCD and maxim codecs nodes for audio on sc7280 based platforms. This patch set depends on: -- https://patchwork.kernel.org/project/linux-arm-msm/list/?series=631506 -- https://patchwork.kernel.org/project/linux-arm-msm/list/?series=601249 -- Clock reset control patches Changes Since V7: -- Remove redundant interrupt names in soundwire node. -- Fix typo errors. -- Remove redundant reg property in sound node. -- Rebased on top of latest kernel tip. Changes Since V6: -- Modify link-names and audio routing in a sound node. -- Move amp_en pin control node to appropriate consumer patch. -- Split patches as per digital macro codecs and board specific codecs and sort it. -- Modify label and node names to lpass specific. Changes Since V5: -- Move soc specific bolero digital codec nodes to soc specific file. -- Bring wcd938x codec reset pin control and US/EURO HS selection nodes from other series. -- Change node name and remove redundant status property in sound node. Changes Since V4: -- Update nodes in sorting order. -- Update DTS node names as per dt-bindings. -- Update Node properties in proper order. -- Update missing pinctrl properties like US/EURO HS selection, wcd reset control. -- Remove redundant labels. -- Remove unused size cells and address cells in tx macro node. -- Keep all same nodes at one place, which are defined in same file. -- Add max98360a codec node to herobrine board specific targets. Changes Since V3: -- Move digital codec macro nodes to board specific dtsi file. -- Update pin controls in lpass cpu node. -- Update dependency patch list. -- Create patches on latest kernel. Changes Since V2: -- Add power domains to digital codec macro nodes. -- Change clock node usage in lpass cpu node. -- Add codec mem clock to lpass cpu node. -- Modify the node names to be generic. -- Move sound and codec nodes to root node. -- sort dai links as per reg. -- Fix typo errors. Changes Since V1: -- Update the commit message of cpu node patch. -- Add gpio control property to support Euro headset in wcd938x node. -- Fix clock properties in lpass cpu and digital codec macro node. Srinivasa Rao Mandadapu (4): arm64: dts: qcom: sc7280: Add nodes for soundwire and va tx rx digital macro codecs arm64: dts: qcom: sc7280: Add nodes for wcd9385 and max98360a codec arm64: dts: qcom: sc7280: Add lpass cpu node arm64: dts: qcom: sc7280: Add dt nodes for sound card arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts | 29 ++++ arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 8 + arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 218 +++++++++++++++++++++++++ arch/arm64/boot/dts/qcom/sc7280.dtsi | 190 +++++++++++++++++++++ 4 files changed, 445 insertions(+) -- 2.7.4