Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
MIME-Version: 1.0
Message-ID: <trinity-bf1af823-9e46-4da7-bec5-6e749a4dc2e3-1650459878842@3c-app-gmx-bap05>
From:   Frank Wunderlich <frank-w@public-files.de>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc:     Frank Wunderlich <linux@fw-web.de>,
        linux-rockchip@lists.infradead.org,
        Kishon Vijay Abraham I <kishon@ti.com>,
        Vinod Koul <vkoul@kernel.org>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzk+dt@kernel.org>,
        Heiko Stuebner <heiko@sntech.de>,
        Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
        =?UTF-8?Q?Krzysztof_Wilczy=C5=84ski?= <kw@linux.com>,
        Bjorn Helgaas <bhelgaas@google.com>,
        Philipp Zabel <p.zabel@pengutronix.de>,
        Johan Jonker <jbx6244@gmail.com>,
        Peter Geis <pgwipeout@gmail.com>,
        Michael Riesch <michael.riesch@wolfvision.net>,
        linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,
        linux-pci@vger.kernel.org
Subject: Aw: Re:  Re: [RFC/RFT 2/6] dt-bindings: soc: grf: add
 pcie30-{phy,pipe}-grf
Content-Type: text/plain; charset=UTF-8
Date:   Wed, 20 Apr 2022 15:04:38 +0200
Importance: normal
Sensitivity: Normal
In-Reply-To: <8b9ad0a6-acc0-aad9-c49d-e4a4b38374bb@linaro.org>
References: <20220416135458.104048-1-linux@fw-web.de>
 <20220416135458.104048-3-linux@fw-web.de>
 <02b3fe1c-12f9-8f96-a9b5-df44ca001825@linaro.org>
 <trinity-c60358c4-ebd1-47bf-91e0-9ae0beefd39f-1650389348418@3c-app-gmx-bap70>
 <8b9ad0a6-acc0-aad9-c49d-e4a4b38374bb@linaro.org>
Content-Transfer-Encoding: quoted-printable
Precedence: bulk

> Gesendet: Dienstag, 19. April 2022 um 21:40 Uhr
> Von: "Krzysztof Kozlowski" <krzysztof.kozlowski@linaro.org>
> On 19/04/2022 19:29, Frank Wunderlich wrote:
> >> Gesendet: Montag, 18. April 2022 um 17:54 Uhr
> >> Von: "Krzysztof Kozlowski" <krzysztof.kozlowski@linaro.org>
> >
> >>> --- a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml
> >>> +++ b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml
> >>> @@ -14,6 +14,8 @@ properties:
> >>>      oneOf:
> >>>        - items:
> >>>            - enum:
> >>> +              - rockchip,pcie30-phy-grf
> >>> +              - rockchip,pcie30-pipe-grf
> >>
> >> These are without SoC parts. Are these PCIe v3 General Register Files
> >> part of some PCIe spec?
> >
> > imho they are shared across SoCs rk3568 and rk3588, but have only seen=
 rk3568 implementation yet.
> > PCIe driver currently supports these 2 Soc (different offsets in the P=
hy-GRF), but can only test rk3568.
> >
> > pipe-grf seems only be used for rk35688 (offset used in probe is defin=
ed for this SoC), which i cannot test.
> >
> > so i have left them SoC independed.
>
> Compatibles should be SoC dependent, with some exceptions. Lack of
> documentation or lack of possibility of testing is actually argument
> against any exception, so they should be SoC specific/dependent.

so i will change to

              - rockchip,rk3568-pcie30-phy-grf
              - rockchip,rk3588-pcie30-pipe-grf

and maybe add

              - rockchip,rk3588-pcie30-phy-grf

these compatibles are not directly taken by any driver as the nodes be lin=
ked via phandle (rockchip,phy-grf property) from the phy driver (rockchip,=
rk3568-pcie3-phy / rockchip,rk3588-pcie3-phy). So these compatibles are on=
ly in the yaml and dts present.

regards Frank