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From:   Frank Wunderlich <frank-w@public-files.de>
To:     Peter Geis <pgwipeout@gmail.com>
Cc:     Bjorn Helgaas <helgaas@kernel.org>,
        Rob Herring <robh+dt@kernel.org>,
        Frank Wunderlich <linux@fw-web.de>,
        "open list:ARM/Rockchip SoC..." <linux-rockchip@lists.infradead.org>,
        Kishon Vijay Abraham I <kishon@ti.com>,
        Vinod Koul <vkoul@kernel.org>,
        Krzysztof Kozlowski <krzk+dt@kernel.org>,
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        Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
        =?UTF-8?Q?Krzysztof_Wilczy=C5=84ski?= <kw@linux.com>,
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        Johan Jonker <jbx6244@gmail.com>,
        Michael Riesch <michael.riesch@wolfvision.net>,
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Subject: Aw: Re: Re: [RFC/RFT 4/6] PCI: rockchip-dwc: add pcie bifurcation
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Date:   Thu, 21 Apr 2022 17:41:39 +0200
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> Gesendet: Montag, 18. April 2022 um 18:17 Uhr
> Von: "Peter Geis" <pgwipeout@gmail.com>
> > On Sun, Apr 17, 2022 at 11:08:02AM +0200, Frank Wunderlich wrote:
> > > > On Sat, Apr 16, 2022 at 03:54:56PM +0200, Frank Wunderlich wrote:
> > > > > From: Frank Wunderlich <frank-w@public-files.de>
> > > > >
> > > > > PCIe Lanes can be split to 2 slots with bifurcation.
> > > > > Add support for this in existing pcie driver.
> >
> > > > Is the "rockchip,bifurcation" DT property something that should be
> > > > generalized so it's not rockchip-specific?  Other controllers are
> > > > likely to support similar functionality.
> > >
> > > I do not know if other controllers support similar functionality,
> > > but i ack a property without vendor prefix is better. Should i use
> > > "bifurcation" as name or do you think about a different name which
> > > is more generic?
> >
> > Really a question for Rob about what name would be good and where it
> > should go.
>
> It might be good to define this as a lane map.
> In the Rockchip implementation it's only 2+0 or 1+1, but that isn't
> guaranteed if this is made into a standard definition.
> So perhaps:
> pcie-bifurcation-map =3D <0>, <1>;
> pcie-bifurcation-map =3D <1>;
> pcie-bifurcation-map =3D <4>, <5>, <6>, <7>;

how about a lane-map like this (from controllers point of view):

rockchip with only 2 lanes (like rk3568):

controller 1:
lane-map =3D <1 0>;

controller 2:
lane-map =3D <0 1>;

here bifurcation is set if a controller does not aquire all lanes.Afaik rk=
3568 cannot select specific lanes so i end up with bifurcation =3D true/fa=
lse (an aggregation-mode on phy) again. but it makes dts-property more usa=
ble for other devices/SoC.

this contains the maximum of lanes and as mask the lanes to take by the cu=
rrent controller. It is scalable to support more pcie-lanes (x2 x4 x8)

example for 2 controllers with PCIe x4 (with 8 lanes available):

lane-map=3D<0 0 0 0 1 1 1 1>;
lane-map=3D<1 1 1 1 0 0 0 0>;

of course they can be mixed, if driver supports this.

lane-map=3D<0 1 0 1 0 1 0 1>;
lane-map=3D<1 0 1 0 1 0 1 0>;

such lane-map is more flexible

regards Frank