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Registered in England and Wales under Company Registration No. 3798903 From: David Howells In-Reply-To: <20220415123614.54024-3-jefflexu@linux.alibaba.com> References: <20220415123614.54024-3-jefflexu@linux.alibaba.com> <20220415123614.54024-1-jefflexu@linux.alibaba.com> To: Jeffle Xu Cc: dhowells@redhat.com, linux-cachefs@redhat.com, xiang@kernel.org, chao@kernel.org, linux-erofs@lists.ozlabs.org, torvalds@linux-foundation.org, gregkh@linuxfoundation.org, willy@infradead.org, linux-fsdevel@vger.kernel.org, joseph.qi@linux.alibaba.com, bo.liu@linux.alibaba.com, tao.peng@linux.alibaba.com, gerry@linux.alibaba.com, eguan@linux.alibaba.com, linux-kernel@vger.kernel.org, luodaowen.backend@bytedance.com, tianzichen@kuaishou.com, fannaihao@baidu.com, zhangjiachen.jaycee@bytedance.com Subject: Re: [PATCH v9 02/21] cachefiles: notify user daemon when looking up cookie MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-ID: <1444649.1650549423.1@warthog.procyon.org.uk> Date: Thu, 21 Apr 2022 14:57:03 +0100 Message-ID: <1444650.1650549423@warthog.procyon.org.uk> X-Scanned-By: MIMEDefang 2.85 on 10.11.54.7 X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,RDNS_NONE,SPF_HELO_NONE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Jeffle Xu wrote: > + help > + This permits on-demand read mode of cachefiles. In this mode, when > + cache miss, the cachefiles backend instead of netfs, is responsible > + for fetching data, e.g. through user daemon. How about: help This permits userspace to enable the cachefiles on-demand read mode. In this mode, when a cache miss occurs, responsibility for fetching the data lies with the cachefiles backend instead of with the netfs and is delegated to userspace. > + /* > + * 1) Cache has been marked as dead state, and then 2) flush all > + * pending requests in @reqs xarray. The barrier inside set_bit() > + * will ensure that above two ops won't be reordered. > + */ What set_bit()? What "above two ops"? And that's not how barriers work; they provide a partial ordering relative to another pair of barriered ops. Also, set_bit() can't be relied upon to imply a barrier - see Documentation/memory-barriers.txt. > + if (IS_ENABLED(CONFIG_CACHEFILES_ONDEMAND) && > + test_bit(CACHEFILES_ONDEMAND_MODE, &cache->flags)) { It might be worth abstracting this into an inline function in internal.h: static inline bool cachefiles_in_ondemand_mode(cache) { return IS_ENABLED(CONFIG_CACHEFILES_ONDEMAND) && test_bit(CACHEFILES_ONDEMAND_MODE, &cache->flags) } > +#ifdef CONFIG_CACHEFILES_ONDEMAND This looks like it ought to be superfluous, given the preceding test - though I can see why you need it: > +#ifdef CONFIG_CACHEFILES_ONDEMAND > + struct xarray reqs; /* xarray of pending on-demand requests */ > + struct xarray ondemand_ids; /* xarray for ondemand_id allocation */ > + u32 ondemand_id_next; > +#endif I'm tempted to say that you should just make them non-conditional. It's not like there's likely to be more than one or two cachefiles_cache structs on a system. David