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Date:   Wed, 20 Apr 2022 13:15:08 +0800
From:   Tan Tee Min <tee.min.tan@linux.intel.com>
To:     Richard Cochran <richardcochran@gmail.com>
Cc:     Jakub Kicinski <kuba@kernel.org>,
        Tan Tee Min <tee.min.tan@intel.com>,
        Giuseppe Cavallaro <peppe.cavallaro@st.com>,
        Alexandre Torgue <alexandre.torgue@st.com>,
        Jose Abreu <joabreu@synopsys.com>,
        "David S . Miller" <davem@davemloft.net>,
        Paolo Abeni <pabeni@redhat.com>,
        Maxime Coquelin <mcoquelin.stm32@gmail.com>,
        Rayagond Kokatanur <rayagond@vayavyalabs.com>,
        netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com,
        linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,
        stable@vger.kernel.org, Voon Wei Feng <weifeng.voon@intel.com>,
        Wong Vee Khee <vee.khee.wong@intel.com>,
        Song Yoong Siang <yoong.siang.song@intel.com>,
        Alexandre Torgue <alexandre.torgue@foss.st.com>
Subject: Re: [PATCH net 1/1] net: stmmac: add fsleep() in HW Rx timestamp
 checking loop
Message-ID: <20220420051508.GA18173@linux.intel.com>
References: <20220413040115.2351987-1-tee.min.tan@intel.com>
 <20220413125915.GA667752@hoboy.vegasvil.org>
 <20220414072934.GA10025@linux.intel.com>
 <20220414104259.0b928249@kernel.org>
 <20220419005220.GA17634@linux.intel.com>
 <20220419132853.GA19386@hoboy.vegasvil.org>
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On Tue, Apr 19, 2022 at 06:28:53AM -0700, Richard Cochran wrote:
> On Tue, Apr 19, 2022 at 08:52:20AM +0800, Tan Tee Min wrote:
> 
> > I agree that the fsleep(1) (=1us) is a big hammer.
> > Thus in order to improve this, I’ve figured out a smaller delay
> > time that is enough for the context descriptor to be ready which
> > is ndelay(500) (=500ns).
> 
> Why isn't the context descriptor ready?
> 
> I mean, the frame already belongs to the CPU, right?

No. The context descriptor (frame) is possibly still owned by the
DMA controller in this situation.
This is why a looping in the original code to wait for the descriptor
to be owned by the application CPU. However, when NAPI is busy polling,
the context descriptor might be still owned by the DMA controller even
after the looping.

Thus, we are adding an additional nanosecond delay inside the loop,
so that the DMA controller can get a short moment to breathe and
complete the context descriptor.

Thanks,
Tee Min

> 
> Thanks,
> Richard