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(unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 06B182224F; Wed, 20 Apr 2022 21:19:36 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1650482376; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=pF8LG5F8NwFab7DCpCeNAFG08MwxqutfST9nL8U0DGU=; b=SmyHvjbnhwaIuAfDW87gCfeVZ/nx/ndjme3s8cDm+YEgZg5XokrIK8gGamE4xpJqod/0QH jU5ha0CukGh64yWfEfe1VqIfW8fsb2VWAaLhUcJYPzgf0sgsUDDKL8aawLN1d3LuPWvK4J iJKvNHax5vtCPlm6o47yGQFnxLnzTxQ= From: Michael Walle To: Linus Walleij , Rob Herring , Krzysztof Kozlowski , Philipp Zabel , Alexandre Belloni , Lars Povlsen Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Horatiu Vultur , Michael Walle , Rob Herring Subject: [PATCH v3 1/2] dt-bindings: pinctrl: ocelot: add reset property Date: Wed, 20 Apr 2022 21:19:25 +0200 Message-Id: <20220420191926.3411830-2-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220420191926.3411830-1-michael@walle.cc> References: <20220420191926.3411830-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,RDNS_NONE,SPF_HELO_NONE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On the LAN966x SoC the GPIO controller will be resetted together with the SGPIO and the switch core. Add a phandle to register the shared reset line. Signed-off-by: Michael Walle Acked-by: Rob Herring --- .../devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.yaml index 7149a6655623..98d547c34ef3 100644 --- a/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.yaml @@ -42,6 +42,14 @@ properties: "#interrupt-cells": const: 2 + resets: + maxItems: 1 + + reset-names: + description: Optional shared switch reset. + items: + - const: switch + patternProperties: '-pins$': type: object -- 2.30.2